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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 6345 { 3309 /* divu */, Mips::DIVU, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__GPR32AsmReg1_1, AMFBS_HasStdEnc_HasMips32r6, { MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
6353 { 3309 /* divu */, Mips::DIVU, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStdEnc_HasMips32r6_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
gen/lib/Target/Mips/MipsGenAsmWriter.inc 8818 case Mips::DIVU:
gen/lib/Target/Mips/MipsGenDAGISel.inc16352 /* 30302*/ OPC_EmitNode1, TARGET_VAL(Mips::DIVU), 0,
26507 /* 50184*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DIVU), 0,
gen/lib/Target/Mips/MipsGenFastISel.inc 2511 return fastEmitInst_rr(Mips::DIVU, &Mips::GPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/Mips/MipsGenGlobalISel.inc 1808 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::DIVU,
12710 GIR_BuildMI, /*InsnID*/2, /*Opcode*/Mips::DIVU,
gen/lib/Target/Mips/MipsGenInstrInfo.inc16425 { Mips::DIVU, Mips::DIVU, Mips::DIVU_MMR6 },
16425 { Mips::DIVU, Mips::DIVU, Mips::DIVU_MMR6 },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 4980 case Mips::DIVU:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 1990 case Mips::DIVU:
lib/Target/Mips/MipsISelLowering.cpp 1373 case Mips::DIVU: