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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 5455 { 98 /* addiu */, Mips::ADDiu_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__SImm161_1, AMFBS_InMicroMips_NotMips32r6, { MCK_GPR32AsmReg, MCK_SImm16 }, },
5460 { 98 /* addiu */, Mips::ADDiu_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__SImm161_2, AMFBS_InMicroMips_NotMips32r6, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_SImm16 }, },
5503 { 325 /* addu */, Mips::ADDiu_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__SImm32_Relaxed1_1, AMFBS_InMicroMips, { MCK_GPR32AsmReg, MCK_SImm32_Relaxed }, },
5509 { 325 /* addu */, Mips::ADDiu_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__SImm32_Relaxed1_2, AMFBS_InMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_SImm32_Relaxed }, },
gen/lib/Target/Mips/MipsGenDAGISel.inc15119 /* 27908*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15151 /* 27967*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15183 /* 28026*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15215 /* 28085*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15247 /* 28144*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15279 /* 28203*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15315 /* 28269*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15339 /* 28314*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15475 /* 28568*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15508 /* 28628*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15541 /* 28688*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15574 /* 28748*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15607 /* 28808*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15640 /* 28868*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15677 /* 28935*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15702 /* 28981*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
15896 /* 29332*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
22795 /* 42700*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
22836 /* 42782*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
22871 /* 42854*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
22906 /* 42926*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
22941 /* 42998*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
22976 /* 43070*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23105 /* 43312*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23128 /* 43356*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23151 /* 43400*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23174 /* 43444*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23197 /* 43488*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23226 /* 43543*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
23531 /* 44143*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDiu_MM), 0,
gen/lib/Target/Mips/MipsGenInstrInfo.inc16479 { Mips::ADDiu, Mips::ADDiu, Mips::ADDiu_MM },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 6208 case Mips::ADDiu_MM:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 2475 case Mips::ADDiu: case Mips::ADDiu_MM:
4580 case Mips::ADDiu_MM:
lib/Target/Mips/MicroMipsSizeReduction.cpp 218 {RT_OneInstr, OpCodes(Mips::ADDiu_MM, Mips::ADDIUR1SP_MM),
220 {RT_OneInstr, OpCodes(Mips::ADDiu_MM, Mips::ADDIUSP_MM),