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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenFastISel.inc 3406 case ISD::ADD: return fastEmit_ISD_ADD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3407 case ISD::ADDC: return fastEmit_ISD_ADDC_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3408 case ISD::ADDE: return fastEmit_ISD_ADDE_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3409 case ISD::AND: return fastEmit_ISD_AND_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3410 case ISD::FADD: return fastEmit_ISD_FADD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3411 case ISD::FDIV: return fastEmit_ISD_FDIV_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3412 case ISD::FMUL: return fastEmit_ISD_FMUL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3413 case ISD::FSUB: return fastEmit_ISD_FSUB_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3414 case ISD::MUL: return fastEmit_ISD_MUL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3415 case ISD::MULHS: return fastEmit_ISD_MULHS_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3416 case ISD::MULHU: return fastEmit_ISD_MULHU_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3417 case ISD::OR: return fastEmit_ISD_OR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3418 case ISD::ROTR: return fastEmit_ISD_ROTR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3419 case ISD::SDIV: return fastEmit_ISD_SDIV_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3420 case ISD::SHL: return fastEmit_ISD_SHL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3421 case ISD::SMAX: return fastEmit_ISD_SMAX_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3422 case ISD::SMIN: return fastEmit_ISD_SMIN_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3423 case ISD::SRA: return fastEmit_ISD_SRA_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3424 case ISD::SREM: return fastEmit_ISD_SREM_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3425 case ISD::SRL: return fastEmit_ISD_SRL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3426 case ISD::SUB: return fastEmit_ISD_SUB_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3427 case ISD::SUBC: return fastEmit_ISD_SUBC_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3428 case ISD::UDIV: return fastEmit_ISD_UDIV_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3429 case ISD::UMAX: return fastEmit_ISD_UMAX_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3430 case ISD::UMIN: return fastEmit_ISD_UMIN_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3431 case ISD::UREM: return fastEmit_ISD_UREM_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3432 case ISD::XOR: return fastEmit_ISD_XOR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3433 case MipsISD::BuildPairF64: return fastEmit_MipsISD_BuildPairF64_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3434 case MipsISD::DivRem: return fastEmit_MipsISD_DivRem_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3435 case MipsISD::DivRem16: return fastEmit_MipsISD_DivRem16_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3436 case MipsISD::DivRemU: return fastEmit_MipsISD_DivRemU_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3437 case MipsISD::DivRemU16: return fastEmit_MipsISD_DivRemU16_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3438 case MipsISD::EH_RETURN: return fastEmit_MipsISD_EH_RETURN_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3439 case MipsISD::ILVEV: return fastEmit_MipsISD_ILVEV_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3440 case MipsISD::ILVL: return fastEmit_MipsISD_ILVL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3441 case MipsISD::ILVOD: return fastEmit_MipsISD_ILVOD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3442 case MipsISD::ILVR: return fastEmit_MipsISD_ILVR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3443 case MipsISD::MTLOHI: return fastEmit_MipsISD_MTLOHI_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3444 case MipsISD::Mult: return fastEmit_MipsISD_Mult_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3445 case MipsISD::Multu: return fastEmit_MipsISD_Multu_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3446 case MipsISD::PCKEV: return fastEmit_MipsISD_PCKEV_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3447 case MipsISD::PCKOD: return fastEmit_MipsISD_PCKOD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
3448 case MipsISD::VNOR: return fastEmit_MipsISD_VNOR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);