reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1330 OpIdx = *(p + 1); 1334 static_cast<MipsOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1); 1337 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - 1340 unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0]; 1346 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPR32AsmRegOperands(Inst, 1); 1349 static_cast<MipsOperand&>(*Operands[OpIdx]).addAFGR64AsmRegOperands(Inst, 1); 1352 static_cast<MipsOperand&>(*Operands[OpIdx]).addFGR64AsmRegOperands(Inst, 1); 1355 static_cast<MipsOperand&>(*Operands[OpIdx]).addFGR32AsmRegOperands(Inst, 1); 1358 static_cast<MipsOperand&>(*Operands[OpIdx]).addSImmOperands<32>(Inst, 1); 1361 static_cast<MipsOperand&>(*Operands[OpIdx]).addMSA128AsmRegOperands(Inst, 1); 1364 static_cast<MipsOperand&>(*Operands[OpIdx]).addSImmOperands<16>(Inst, 1); 1367 static_cast<MipsOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1); 1370 static_cast<MipsOperand&>(*Operands[OpIdx]).addImmOperands(Inst, 1); 1373 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPRMM16AsmRegOperands(Inst, 1); 1376 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantSImmOperands<4, 0>(Inst, 1); 1379 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<5, 0>(Inst, 1); 1382 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<2, 0>(Inst, 1); 1385 static_cast<MipsOperand&>(*Operands[OpIdx]).addUImmOperands<16>(Inst, 1); 1388 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPR64AsmRegOperands(Inst, 1); 1391 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<8, 0>(Inst, 1); 1397 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<5, 32, -32>(Inst, 1); 1403 static_cast<MipsOperand&>(*Operands[OpIdx]).addFCCAsmRegOperands(Inst, 1); 1406 static_cast<MipsOperand&>(*Operands[OpIdx]).addCOP2AsmRegOperands(Inst, 1); 1409 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<3, 0>(Inst, 1); 1412 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<6, 0>(Inst, 1); 1415 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<4, 0>(Inst, 1); 1421 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<10, 0>(Inst, 1); 1424 static_cast<MipsOperand&>(*Operands[OpIdx]).addMemOperands(Inst, 2); 1427 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantSImmOperands<5, 0>(Inst, 1); 1430 static_cast<MipsOperand&>(*Operands[OpIdx]).addCCRAsmRegOperands(Inst, 1); 1433 static_cast<MipsOperand&>(*Operands[OpIdx]).addMSACtrlAsmRegOperands(Inst, 1); 1436 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<1, 0>(Inst, 1); 1439 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<5, 33>(Inst, 1); 1442 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<5, 32>(Inst, 1); 1445 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<5, 1>(Inst, 1); 1448 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPR32NonZeroAsmRegOperands(Inst, 1); 1451 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPR32ZeroAsmRegOperands(Inst, 1); 1454 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<2, 1>(Inst, 1); 1457 static_cast<MipsOperand&>(*Operands[OpIdx]).addCOP0AsmRegOperands(Inst, 1); 1463 static_cast<MipsOperand&>(*Operands[OpIdx]).addACC64DSPAsmRegOperands(Inst, 1); 1466 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<1>(Inst, 1); 1475 static_cast<MipsOperand&>(*Operands[OpIdx]).addMicroMipsMemOperands(Inst, 2); 1478 static_cast<MipsOperand&>(*Operands[OpIdx]).addCOP3AsmRegOperands(Inst, 1); 1481 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantSImmOperands<10, 0>(Inst, 1); 1484 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<32>(Inst, 1); 1487 static_cast<MipsOperand&>(*Operands[OpIdx]).addStrictlyAFGR64AsmRegOperands(Inst, 1); 1490 static_cast<MipsOperand&>(*Operands[OpIdx]).addStrictlyFGR64AsmRegOperands(Inst, 1); 1493 static_cast<MipsOperand&>(*Operands[OpIdx]).addStrictlyFGR32AsmRegOperands(Inst, 1); 1496 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<7, -1>(Inst, 1); 1499 static_cast<MipsOperand&>(*Operands[OpIdx]).addRegListOperands(Inst, 1); 1508 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPRMM16AsmRegMovePPairFirstOperands(Inst, 1); 1511 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPRMM16AsmRegMovePPairSecondOperands(Inst, 1); 1514 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPRMM16AsmRegMovePOperands(Inst, 1); 1517 static_cast<MipsOperand&>(*Operands[OpIdx]).addHI32DSPAsmRegOperands(Inst, 1); 1520 static_cast<MipsOperand&>(*Operands[OpIdx]).addLO32DSPAsmRegOperands(Inst, 1); 1526 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<7, 0>(Inst, 1); 1529 static_cast<MipsOperand&>(*Operands[OpIdx]).addHWRegsAsmRegOperands(Inst, 1); 1532 static_cast<MipsOperand&>(*Operands[OpIdx]).addGPRMM16AsmRegZeroOperands(Inst, 1); 1535 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantUImmOperands<20, 0>(Inst, 1); 1538 static_cast<MipsOperand&>(*Operands[OpIdx]).addConstantSImmOperands<6, 0>(Inst, 1);