reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
2504 case MCK_ConstantUImm5_32_Norm: return true; 2545 case MCK_ConstantUImm5_32_Norm: return true; 2585 case MCK_ConstantUImm5_32_Norm: return true; 2625 case MCK_ConstantUImm5_32_Norm: return true; 2664 case MCK_ConstantUImm5_32_Norm: return true; 2702 case MCK_ConstantUImm5_32_Norm: return true; 2739 case MCK_ConstantUImm5_32_Norm: return true; 2775 case MCK_ConstantUImm5_32_Norm: return true; 2810 case MCK_ConstantUImm5_32_Norm: return true; 2844 case MCK_ConstantUImm5_32_Norm: return true; 2877 case MCK_ConstantUImm5_32_Norm: return true; 2907 case MCK_ConstantUImm5_32_Norm: 3905 case MCK_ConstantUImm5_32_Norm: { 4733 case MCK_ConstantUImm5_32_Norm: return "MCK_ConstantUImm5_32_Norm"; 5611 { 760 /* bbit0 */, Mips::BBIT032, Convert__GPR64AsmReg1_0__ConstantUImm5_32_Norm1_1__JumpTarget1_2, AMFBS_HasCnMips, { MCK_GPR64AsmReg, MCK_ConstantUImm5_32_Norm, MCK_JumpTarget }, }, 5614 { 774 /* bbit1 */, Mips::BBIT132, Convert__GPR64AsmReg1_0__ConstantUImm5_32_Norm1_1__JumpTarget1_2, AMFBS_HasCnMips, { MCK_GPR64AsmReg, MCK_ConstantUImm5_32_Norm, MCK_JumpTarget }, }, 6072 { 2086 /* cins */, Mips::CINS32, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__ConstantUImm5_32_Norm1_1__ConstantUImm5_01_2, AMFBS_HasMips64_HasCnMips, { MCK_GPR64AsmReg, MCK_ConstantUImm5_32_Norm, MCK_ConstantUImm5_0 }, }, 6074 { 2086 /* cins */, Mips::CINS32, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__ConstantUImm5_32_Norm1_2__ConstantUImm5_01_3, AMFBS_HasMips64_HasCnMips, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_ConstantUImm5_32_Norm, MCK_ConstantUImm5_0 }, }, 6558 { 4082 /* exts */, Mips::EXTS32, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__ConstantUImm5_32_Norm1_1__ConstantUImm5_01_2, AMFBS_HasMips64_HasCnMips, { MCK_GPR64AsmReg, MCK_ConstantUImm5_32_Norm, MCK_ConstantUImm5_0 }, }, 6560 { 4082 /* exts */, Mips::EXTS32, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__ConstantUImm5_32_Norm1_2__ConstantUImm5_01_3, AMFBS_HasMips64_HasCnMips, { MCK_GPR64AsmReg, MCK_GPR64AsmReg, MCK_ConstantUImm5_32_Norm, MCK_ConstantUImm5_0 }, },