reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5855 { 1718 /* c.eq.d */, Mips::C_EQ_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5856 { 1718 /* c.eq.d */, Mips::C_EQ_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5867 { 1732 /* c.f.d */, Mips::C_F_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5868 { 1732 /* c.f.d */, Mips::C_F_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5879 { 1744 /* c.le.d */, Mips::C_LE_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5880 { 1744 /* c.le.d */, Mips::C_LE_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5891 { 1758 /* c.lt.d */, Mips::C_LT_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5892 { 1758 /* c.lt.d */, Mips::C_LT_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5903 { 1772 /* c.nge.d */, Mips::C_NGE_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5904 { 1772 /* c.nge.d */, Mips::C_NGE_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5915 { 1788 /* c.ngl.d */, Mips::C_NGL_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5916 { 1788 /* c.ngl.d */, Mips::C_NGL_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5927 { 1804 /* c.ngle.d */, Mips::C_NGLE_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5928 { 1804 /* c.ngle.d */, Mips::C_NGLE_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5939 { 1822 /* c.ngt.d */, Mips::C_NGT_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5940 { 1822 /* c.ngt.d */, Mips::C_NGT_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5951 { 1838 /* c.ole.d */, Mips::C_OLE_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5952 { 1838 /* c.ole.d */, Mips::C_OLE_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5963 { 1854 /* c.olt.d */, Mips::C_OLT_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5964 { 1854 /* c.olt.d */, Mips::C_OLT_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5975 { 1870 /* c.seq.d */, Mips::C_SEQ_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5976 { 1870 /* c.seq.d */, Mips::C_SEQ_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5987 { 1886 /* c.sf.d */, Mips::C_SF_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5988 { 1886 /* c.sf.d */, Mips::C_SF_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5999 { 1900 /* c.ueq.d */, Mips::C_UEQ_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6000 { 1900 /* c.ueq.d */, Mips::C_UEQ_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6011 { 1916 /* c.ule.d */, Mips::C_ULE_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6012 { 1916 /* c.ule.d */, Mips::C_ULE_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6023 { 1932 /* c.ult.d */, Mips::C_ULT_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6024 { 1932 /* c.ult.d */, Mips::C_ULT_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6035 { 1948 /* c.un.d */, Mips::C_UN_D64, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6036 { 1948 /* c.un.d */, Mips::C_UN_D64_MM, Convert__FCCAsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, { MCK_FCCAsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, },