reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5418 { 4 /* abs.d */, Mips::FABS_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 5440 { 49 /* add.d */, Mips::FADD_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6237 { 3011 /* cvt.d.s */, Mips::CVT_D64_S_MM, Convert__FGR64AsmReg1_0__FGR32AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR32AsmReg }, }, 6241 { 3019 /* cvt.d.w */, Mips::CVT_D64_W_MM, Convert__FGR64AsmReg1_0__FGR32AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR32AsmReg }, }, 6243 { 3027 /* cvt.l.d */, Mips::CVT_L_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6246 { 3035 /* cvt.l.s */, Mips::CVT_L_S_MM, Convert__FGR64AsmReg1_0__FGR32AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR32AsmReg }, }, 6252 { 3052 /* cvt.s.d */, Mips::CVT_S_D64_MM, Convert__FGR32AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR32AsmReg, MCK_FGR64AsmReg }, }, 6263 { 3094 /* cvt.w.d */, Mips::CVT_W_D64_MM, Convert__FGR32AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR32AsmReg, MCK_FGR64AsmReg }, }, 6333 { 3233 /* div.d */, Mips::FDIV_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 6992 { 6081 /* mfhc1 */, Mips::MFHC1_D64_MM, Convert__GPR32AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_GPR32AsmReg, MCK_FGR64AsmReg }, }, 7068 { 6455 /* mov.d */, Mips::FMOV_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 7145 { 6684 /* mtc1 */, Mips::MTC1_D64_MM, Convert__FGR64AsmReg1_1__GPR32AsmReg1_0, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_GPR32AsmReg, MCK_FGR64AsmReg }, }, 7158 { 6706 /* mthc1 */, Mips::MTHC1_D64_MM, Convert__FGR64AsmReg1_1__Tie0_1_1__GPR32AsmReg1_0, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_GPR32AsmReg, MCK_FGR64AsmReg }, }, 7210 { 6842 /* mul.d */, Mips::FMUL_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 7271 { 7086 /* neg.d */, Mips::FNEG_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 7430 { 7688 /* recip.d */, Mips::RECIP_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 7482 { 7820 /* rsqrt.d */, Mips::RSQRT_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 7740 { 8543 /* sqrt.d */, Mips::FSQRT_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 7821 { 8835 /* sub.d */, Mips::FSUB_D64_MM, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, { MCK_FGR64AsmReg, MCK_FGR64AsmReg, MCK_FGR64AsmReg }, }, 8303 { 4 /* abs.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 8325 { 49 /* add.d */, 7 /* 0, 1, 2 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9408 { 3011 /* cvt.d.s */, 2 /* 1 */, MCK_FGR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9409 { 3011 /* cvt.d.s */, 1 /* 0 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9416 { 3019 /* cvt.d.w */, 2 /* 1 */, MCK_FGR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9417 { 3019 /* cvt.d.w */, 1 /* 0 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9419 { 3027 /* cvt.l.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9423 { 3035 /* cvt.l.s */, 2 /* 1 */, MCK_FGR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9424 { 3035 /* cvt.l.s */, 1 /* 0 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9435 { 3052 /* cvt.s.d */, 1 /* 0 */, MCK_FGR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9436 { 3052 /* cvt.s.d */, 2 /* 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9454 { 3094 /* cvt.w.d */, 1 /* 0 */, MCK_FGR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9455 { 3094 /* cvt.w.d */, 2 /* 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 9521 { 3233 /* div.d */, 7 /* 0, 1, 2 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10371 { 6081 /* mfhc1 */, 2 /* 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10372 { 6081 /* mfhc1 */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10462 { 6455 /* mov.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10577 { 6684 /* mtc1 */, 2 /* 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10578 { 6684 /* mtc1 */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10603 { 6706 /* mthc1 */, 2 /* 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10604 { 6706 /* mthc1 */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10674 { 6842 /* mul.d */, 7 /* 0, 1, 2 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10742 { 7086 /* neg.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10898 { 7688 /* recip.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 10955 { 7820 /* rsqrt.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 11241 { 8543 /* sqrt.d */, 3 /* 0, 1 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat }, 11321 { 8835 /* sub.d */, 7 /* 0, 1, 2 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_IsFP64bit_IsNotSoftFloat },