|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/MSP430/MSP430GenDisassemblerTables.inc 1049 tmp = fieldFromInstruction(insn, 0, 4);
1050 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1051 tmp = fieldFromInstruction(insn, 0, 4);
1052 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1055 tmp = fieldFromInstruction(insn, 0, 4);
1056 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1059 tmp = fieldFromInstruction(insn, 0, 4);
1060 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1061 tmp = fieldFromInstruction(insn, 0, 4);
1062 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1065 tmp = fieldFromInstruction(insn, 0, 6);
1066 if (DecodeCGImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1069 tmp = fieldFromInstruction(insn, 0, 4);
1070 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1075 tmp = fieldFromInstruction(insn, 0, 10);
1076 MI.addOperand(MCOperand::createImm(tmp));
1079 tmp = fieldFromInstruction(insn, 0, 10);
1080 MI.addOperand(MCOperand::createImm(tmp));
1081 tmp = fieldFromInstruction(insn, 10, 3);
1082 MI.addOperand(MCOperand::createImm(tmp));
1085 tmp = 0x0;
1086 tmp |= fieldFromInstruction(insn, 0, 4) << 0;
1087 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1088 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1091 tmp = fieldFromInstruction(insn, 16, 16);
1092 MI.addOperand(MCOperand::createImm(tmp));
1095 tmp = fieldFromInstruction(insn, 8, 4);
1096 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1099 tmp = fieldFromInstruction(insn, 0, 4);
1100 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1101 tmp = fieldFromInstruction(insn, 8, 4);
1102 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1105 tmp = fieldFromInstruction(insn, 0, 4);
1106 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1107 tmp = fieldFromInstruction(insn, 8, 4);
1108 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1111 tmp = fieldFromInstruction(insn, 0, 4);
1112 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1113 tmp = fieldFromInstruction(insn, 0, 4);
1114 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1115 tmp = fieldFromInstruction(insn, 8, 4);
1116 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1119 tmp = fieldFromInstruction(insn, 0, 4);
1120 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1121 tmp = fieldFromInstruction(insn, 0, 4);
1122 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1123 tmp = fieldFromInstruction(insn, 8, 4);
1124 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1127 tmp = 0x0;
1128 tmp |= fieldFromInstruction(insn, 0, 4) << 0;
1129 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1130 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1131 tmp = fieldFromInstruction(insn, 8, 4);
1132 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1135 tmp = 0x0;
1136 tmp |= fieldFromInstruction(insn, 0, 4) << 0;
1137 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1138 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1139 tmp = fieldFromInstruction(insn, 8, 4);
1140 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1143 tmp = fieldFromInstruction(insn, 0, 4);
1144 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1145 tmp = 0x0;
1146 tmp |= fieldFromInstruction(insn, 4, 2) << 4;
1147 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1148 if (DecodeCGImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1151 tmp = fieldFromInstruction(insn, 0, 4);
1152 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1153 tmp = 0x0;
1154 tmp |= fieldFromInstruction(insn, 4, 2) << 4;
1155 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1156 if (DecodeCGImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1159 tmp = fieldFromInstruction(insn, 0, 4);
1160 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1161 tmp = fieldFromInstruction(insn, 0, 4);
1162 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1163 tmp = 0x0;
1164 tmp |= fieldFromInstruction(insn, 4, 2) << 4;
1165 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1166 if (DecodeCGImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1169 tmp = fieldFromInstruction(insn, 0, 4);
1170 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1171 tmp = fieldFromInstruction(insn, 0, 4);
1172 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1173 tmp = 0x0;
1174 tmp |= fieldFromInstruction(insn, 4, 2) << 4;
1175 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1176 if (DecodeCGImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1179 tmp = 0x0;
1180 tmp |= fieldFromInstruction(insn, 0, 4) << 0;
1181 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1182 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1183 tmp = 0x0;
1184 tmp |= fieldFromInstruction(insn, 4, 2) << 4;
1185 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1186 if (DecodeCGImm(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1189 tmp = fieldFromInstruction(insn, 0, 4);
1190 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1191 tmp = fieldFromInstruction(insn, 8, 4);
1192 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1193 tmp = fieldFromInstruction(insn, 8, 4);
1194 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1197 tmp = fieldFromInstruction(insn, 0, 4);
1198 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1199 tmp = fieldFromInstruction(insn, 8, 4);
1200 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1203 tmp = fieldFromInstruction(insn, 0, 4);
1204 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1205 tmp = fieldFromInstruction(insn, 8, 4);
1206 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1207 tmp = fieldFromInstruction(insn, 8, 4);
1208 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1211 tmp = fieldFromInstruction(insn, 0, 4);
1212 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1213 tmp = fieldFromInstruction(insn, 8, 4);
1214 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1215 tmp = fieldFromInstruction(insn, 0, 4);
1216 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1217 tmp = fieldFromInstruction(insn, 8, 4);
1218 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1221 tmp = fieldFromInstruction(insn, 0, 4);
1222 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1223 tmp = fieldFromInstruction(insn, 0, 4);
1224 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1225 tmp = fieldFromInstruction(insn, 8, 4);
1226 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1229 tmp = fieldFromInstruction(insn, 0, 4);
1230 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1231 tmp = fieldFromInstruction(insn, 8, 4);
1232 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1233 tmp = fieldFromInstruction(insn, 0, 4);
1234 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1235 tmp = fieldFromInstruction(insn, 8, 4);
1236 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1239 tmp = 0x0;
1240 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1241 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1242 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1245 tmp = fieldFromInstruction(insn, 0, 4);
1246 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1247 tmp = 0x0;
1248 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1249 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1250 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1253 tmp = fieldFromInstruction(insn, 0, 4);
1254 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1255 tmp = fieldFromInstruction(insn, 16, 16);
1256 MI.addOperand(MCOperand::createImm(tmp));
1259 tmp = fieldFromInstruction(insn, 0, 4);
1260 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1261 tmp = 0x0;
1262 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1263 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1264 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1267 tmp = fieldFromInstruction(insn, 0, 4);
1268 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1269 tmp = fieldFromInstruction(insn, 16, 16);
1270 MI.addOperand(MCOperand::createImm(tmp));
1273 tmp = fieldFromInstruction(insn, 0, 4);
1274 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1275 tmp = fieldFromInstruction(insn, 0, 4);
1276 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1277 tmp = 0x0;
1278 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1279 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1280 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1283 tmp = fieldFromInstruction(insn, 0, 4);
1284 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1285 tmp = fieldFromInstruction(insn, 0, 4);
1286 if (DecodeGR16RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1287 tmp = fieldFromInstruction(insn, 16, 16);
1288 MI.addOperand(MCOperand::createImm(tmp));
1291 tmp = fieldFromInstruction(insn, 0, 4);
1292 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1293 tmp = fieldFromInstruction(insn, 0, 4);
1294 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1295 tmp = 0x0;
1296 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1297 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1298 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1301 tmp = fieldFromInstruction(insn, 0, 4);
1302 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1303 tmp = fieldFromInstruction(insn, 0, 4);
1304 if (DecodeGR8RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1305 tmp = fieldFromInstruction(insn, 16, 16);
1306 MI.addOperand(MCOperand::createImm(tmp));
1309 tmp = 0x0;
1310 tmp |= fieldFromInstruction(insn, 0, 4) << 0;
1311 tmp |= fieldFromInstruction(insn, 32, 16) << 4;
1312 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1313 tmp = 0x0;
1314 tmp |= fieldFromInstruction(insn, 8, 4) << 0;
1315 tmp |= fieldFromInstruction(insn, 16, 16) << 4;
1316 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1319 tmp = 0x0;
1320 tmp |= fieldFromInstruction(insn, 0, 4) << 0;
1321 tmp |= fieldFromInstruction(insn, 32, 16) << 4;
1322 if (DecodeMemOperand(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
1323 tmp = fieldFromInstruction(insn, 16, 16);
1324 MI.addOperand(MCOperand::createImm(tmp));