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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 4091 { 461, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x100000000008027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #461 = V6_vaddbnq_alt
4092 { 462, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x100000000008027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #462 = V6_vaddbq_alt
4097 { 467, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x100000000008027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #467 = V6_vaddhnq_alt
4098 { 468, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x100000000008027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #468 = V6_vaddhq_alt
4115 { 485, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x100000000008027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #485 = V6_vaddwnq_alt
4116 { 486, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x100000000008027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #486 = V6_vaddwq_alt
4324 { 694, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x8027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #694 = V6_vsubbnq_alt
4325 { 695, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x8027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #695 = V6_vsubbq_alt
4330 { 700, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x8027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #700 = V6_vsubhnq_alt
4331 { 701, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x8027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #701 = V6_vsubhq_alt
4345 { 715, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x8027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #715 = V6_vsubwnq_alt
4346 { 716, 4, 1, 4, 2, 0|(1ULL<<MCID::Pseudo), 0x8027ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #716 = V6_vsubwq_alt
6184 { 2554, 4, 1, 4, 208, 0, 0x100000000008010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2554 = V6_vaddbnq
6185 { 2555, 4, 1, 4, 208, 0, 0x100000000008010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2555 = V6_vaddbq
6195 { 2565, 4, 1, 4, 208, 0, 0x100000000008010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2565 = V6_vaddhnq
6196 { 2566, 4, 1, 4, 208, 0, 0x100000000008010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2566 = V6_vaddhq
6214 { 2584, 4, 1, 4, 208, 0, 0x100000000008010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2584 = V6_vaddwnq
6215 { 2585, 4, 1, 4, 208, 0, 0x100000000008010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2585 = V6_vaddwq
6532 { 2902, 4, 1, 4, 208, 0, 0x8010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2902 = V6_vsubbnq
6533 { 2903, 4, 1, 4, 208, 0, 0x8010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2903 = V6_vsubbq
6540 { 2910, 4, 1, 4, 208, 0, 0x8010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2910 = V6_vsubhnq
6541 { 2911, 4, 1, 4, 208, 0, 0x8010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2911 = V6_vsubhq
6556 { 2926, 4, 1, 4, 208, 0, 0x8010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2926 = V6_vsubwnq
6557 { 2927, 4, 1, 4, 208, 0, 0x8010ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #2927 = V6_vsubwq