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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 3911 { 281, 3, 1, 4, 30, 0|(1ULL<<MCID::Pseudo), 0x134808026ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #281 = M2_mpysmi
3917 { 287, 3, 1, 4, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x29ULL, nullptr, ImplicitList3, OperandInfo55, -1 ,nullptr }, // Inst #287 = PS_alloca
3921 { 291, 3, 1, 4, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x214800029ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #291 = PS_fi
3965 { 335, 3, 1, 4, 47, 0|(1ULL<<MCID::Pseudo), 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #335 = S2_asr_i_r_rnd_goodsyntax
4383 { 753, 3, 1, 4, 6, 0|(1ULL<<MCID::Add)|(1ULL<<MCID::Predicable), 0x214808002ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #753 = A2_addi
4390 { 760, 3, 1, 4, 6, 0, 0x154808000ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #760 = A2_andir
4413 { 783, 3, 1, 4, 6, 0, 0x154808000ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #783 = A2_orir
4566 { 936, 3, 1, 4, 47, 0, 0x20000000000802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #936 = A4_cround_ri
4597 { 967, 3, 1, 4, 6, 0, 0x114808000ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #967 = A4_rcmpeqi
4599 { 969, 3, 1, 4, 6, 0, 0x114808000ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #969 = A4_rcmpneqi
4600 { 970, 3, 1, 4, 47, 0, 0x20000000000802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #970 = A4_round_ri
4601 { 971, 3, 1, 4, 47, 0, 0x20000000000802cULL, nullptr, ImplicitList20, OperandInfo55, -1 ,nullptr }, // Inst #971 = A4_round_ri_sat
4819 { 1189, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1189 = J4_cmpeq_f_jumpnv_nt
4820 { 1190, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974804c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1190 = J4_cmpeq_f_jumpnv_t
4825 { 1195, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1195 = J4_cmpeq_t_jumpnv_nt
4826 { 1196, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974804428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1196 = J4_cmpeq_t_jumpnv_t
4855 { 1225, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1225 = J4_cmpgt_f_jumpnv_nt
4856 { 1226, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974804c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1226 = J4_cmpgt_f_jumpnv_t
4861 { 1231, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1231 = J4_cmpgt_t_jumpnv_nt
4862 { 1232, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974804428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1232 = J4_cmpgt_t_jumpnv_t
4891 { 1261, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1261 = J4_cmpgtu_f_jumpnv_nt
4892 { 1262, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974804c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1262 = J4_cmpgtu_f_jumpnv_t
4897 { 1267, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1267 = J4_cmpgtu_t_jumpnv_nt
4898 { 1268, 3, 0, 4, 117, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974804428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1268 = J4_cmpgtu_t_jumpnv_t
4915 { 1285, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1285 = J4_cmplt_f_jumpnv_nt
4916 { 1286, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974814c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1286 = J4_cmplt_f_jumpnv_t
4917 { 1287, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1287 = J4_cmplt_t_jumpnv_nt
4918 { 1288, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974814428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1288 = J4_cmplt_t_jumpnv_t
4919 { 1289, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1289 = J4_cmpltu_f_jumpnv_nt
4920 { 1290, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974814c28ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1290 = J4_cmpltu_f_jumpnv_t
4921 { 1291, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1291 = J4_cmpltu_t_jumpnv_nt
4922 { 1292, 3, 0, 4, 121, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x2009974814428ULL, nullptr, ImplicitList19, OperandInfo55, -1 ,nullptr }, // Inst #1292 = J4_cmpltu_t_jumpnv_t
4951 { 1321, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x4c0594808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1321 = L2_loadbsw2_io
4963 { 1333, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad), 0x4c0594808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1333 = L2_loadbzw2_io
4975 { 1345, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x2c0174808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1345 = L2_loadrb_io
4989 { 1359, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x4c0594808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1359 = L2_loadrh_io
4996 { 1366, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x6c09b4808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1366 = L2_loadri_io
5003 { 1373, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x2c0174808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1373 = L2_loadrub_io
5010 { 1380, 3, 1, 4, 19, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x4c0594808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1380 = L2_loadruh_io
5088 { 1458, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x4800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1458 = L4_loadbsw2_ap
5092 { 1462, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x4800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1462 = L4_loadbzw2_ap
5097 { 1467, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x2800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1467 = L4_loadrb_ap
5103 { 1473, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x4800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1473 = L4_loadrh_ap
5106 { 1476, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x6800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1476 = L4_loadri_ap
5109 { 1479, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x2800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1479 = L4_loadrub_ap
5112 { 1482, 3, 2, 4, 132, 0|(1ULL<<MCID::MayLoad), 0x4800c5808025ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1482 = L4_loadruh_ap
5347 { 1717, 3, 1, 4, 30, 0, 0x200000000008026ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1717 = M2_mpysin
5348 { 1718, 3, 1, 4, 30, 0, 0x200000104808026ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1718 = M2_mpysip
5537 { 1907, 3, 1, 4, 8, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1907 = S2_asl_i_r
5542 { 1912, 3, 1, 4, 66, 0, 0x20000000000802cULL, nullptr, ImplicitList20, OperandInfo55, -1 ,nullptr }, // Inst #1912 = S2_asl_i_r_sat
5566 { 1936, 3, 1, 4, 8, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1936 = S2_asr_i_r
5571 { 1941, 3, 1, 4, 47, 0, 0x20000000000802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1941 = S2_asr_i_r_rnd
5600 { 1970, 3, 1, 4, 8, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #1970 = S2_clrbit_i
5636 { 2006, 3, 1, 4, 8, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2006 = S2_lsr_i_r
5708 { 2078, 3, 1, 4, 8, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2078 = S2_setbit_i
5777 { 2147, 3, 1, 4, 8, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2147 = S2_togglebit_i
5813 { 2183, 3, 1, 4, 47, 0, 0x20000000000802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2183 = S4_clbaddi
5970 { 2340, 3, 1, 4, 83, 0, 0x802cULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2340 = S6_rol_i_r