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References

gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc
 3343       return MCK_z;	 // "z"
 7356   case MCK_z: return "MCK_z";
 9373   { 158 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, },
 9545   { 158 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
 9546   { 158 /* if */, Hexagon::V6_zLd_pred_ppu, Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, },
 9631   { 158 /* if */, Hexagon::V6_zLd_pred_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
10233   { 379 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, },
10234   { 379 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
10235   { 379 /* z */, Hexagon::V6_zLd_ppu, Convert__Reg1_4__Tie0_0_0__Reg1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, },
10236   { 379 /* z */, Hexagon::V6_zLd_pi, Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },