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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 4329 return MCK_vrmpy; // "vrmpy"
7263 case MCK_vrmpy: return "MCK_vrmpy";
8806 { 0 /* */, Hexagon::V6_vrmpyub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
8807 { 0 /* */, Hexagon::V6_vrmpyub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
8818 { 0 /* */, Hexagon::V6_vrmpybub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
8819 { 0 /* */, Hexagon::V6_vrmpybub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
8902 { 0 /* */, Hexagon::V6_vrmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
8903 { 0 /* */, Hexagon::V6_vrmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, },
8921 { 0 /* */, Hexagon::V6_vrmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, },
8922 { 0 /* */, Hexagon::V6_vrmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, },
8923 { 0 /* */, Hexagon::V6_vrmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, },
9002 { 0 /* */, Hexagon::V6_vrmpyub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
9003 { 0 /* */, Hexagon::V6_vrmpyub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
9012 { 0 /* */, Hexagon::V6_vrmpybub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
9013 { 0 /* */, Hexagon::V6_vrmpybub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
9042 { 0 /* */, Hexagon::V6_vrmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, },
9043 { 0 /* */, Hexagon::V6_vrmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, },
9050 { 0 /* */, Hexagon::V6_vrmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, },
9051 { 0 /* */, Hexagon::V6_vrmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, },
9052 { 0 /* */, Hexagon::V6_vrmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, },
9090 { 0 /* */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
9094 { 0 /* */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
9198 { 0 /* */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
9201 { 0 /* */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },