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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 6560 case MCK_u4_0Imm: {
7425 case MCK_u4_0Imm: return "MCK_u4_0Imm";
8078 { 0 /* */, Hexagon::S2_asl_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, },
8080 { 0 /* */, Hexagon::S2_asr_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, },
8083 { 0 /* */, Hexagon::S2_lsr_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, },
8516 { 0 /* */, Hexagon::S5_vasrhrnd, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, },
8517 { 0 /* */, Hexagon::S5_vasrhrnd_goodsyntax, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, },
8548 { 0 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8549 { 0 /* */, Hexagon::S2_tableidxd_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8550 { 0 /* */, Hexagon::S2_tableidxh_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8551 { 0 /* */, Hexagon::S2_tableidxw_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8552 { 0 /* */, Hexagon::S5_asrhub_rnd_sat, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, },
8553 { 0 /* */, Hexagon::S5_asrhub_sat, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, },
8722 { 0 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, },
8723 { 0 /* */, Hexagon::S2_tableidxd, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, },
8724 { 0 /* */, Hexagon::S2_tableidxh, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, },
8725 { 0 /* */, Hexagon::S2_tableidxw, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, },
8726 { 0 /* */, Hexagon::S5_asrhub_rnd_sat_goodsyntax, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, },