reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc
 6525   case MCK_u30_2Imm: {
 7420   case MCK_u30_2Imm: return "MCK_u30_2Imm";
 7902   { 0 /*  */, Hexagon::PS_loadriabs, Convert__Reg1_0__u30_2Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, },
 8400   { 0 /*  */, Hexagon::L2_loadrigp, Convert__Reg1_0__u30_2Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, },
 9540   { 158 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
 9552   { 158 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, },
 9583   { 158 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
 9593   { 158 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, },
 9683   { 158 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
 9701   { 158 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
 9707   { 158 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, },
 9715   { 158 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
 9733   { 158 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
 9739   { 158 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, },
 9855   { 158 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
 9875   { 158 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
10054   { 239 /* memw */, Hexagon::PS_storeriabs, Convert__u30_2Imm1_3__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
10063   { 239 /* memw */, Hexagon::PS_storerinewabs, Convert__u30_2Imm1_3__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
10064   { 239 /* memw */, Hexagon::S2_storerigp, Convert__u30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
10070   { 239 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, },
10071   { 239 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, },
10072   { 239 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, },
10073   { 239 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, },
10076   { 239 /* memw */, Hexagon::S2_storerinewgp, Convert__u30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
10078   { 239 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, },
10079   { 239 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, },
10085   { 239 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
10086   { 239 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },