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definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
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References

gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc
 6497   case MCK_u1_0Imm: {
 7416   case MCK_u1_0Imm: return "MCK_u1_0Imm";
 8343   { 0 /*  */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 8344   { 0 /*  */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 8345   { 0 /*  */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrsadub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 8519   { 0 /*  */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 8520   { 0 /*  */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 8521   { 0 /*  */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrsadub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 9090   { 0 /*  */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 9091   { 0 /*  */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 9094   { 0 /*  */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 9198   { 0 /*  */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 9199   { 0 /*  */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
 9201   { 0 /*  */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
10226   { 354 /* vwhist128 */, Hexagon::V6_vwhist128m, Convert__u1_0Imm1_3, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },
10227   { 354 /* vwhist128 */, Hexagon::V6_vwhist128qm, Convert__Reg1_2__u1_0Imm1_4, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK_HvxQR, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, },