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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 6420 case MCK_s4_0Imm: {
7405 case MCK_s4_0Imm: return "MCK_s4_0Imm";
8446 { 0 /* */, Hexagon::V6_vL32b_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8448 { 0 /* */, Hexagon::V6_vL32Ub_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8510 { 0 /* */, Hexagon::L2_loadalignb_pi, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8539 { 0 /* */, Hexagon::L2_loadrb_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8542 { 0 /* */, Hexagon::L2_loadrub_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8651 { 0 /* */, Hexagon::V6_vL32b_cur_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8655 { 0 /* */, Hexagon::V6_vL32b_tmp_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8663 { 0 /* */, Hexagon::V6_vL32b_nt_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
8865 { 0 /* */, Hexagon::V6_vL32b_nt_cur_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
8885 { 0 /* */, Hexagon::V6_vL32b_nt_tmp_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9060 { 0 /* */, Hexagon::L2_loadalignb_pci, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },
9103 { 0 /* */, Hexagon::L2_loadrb_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },
9106 { 0 /* */, Hexagon::L2_loadrub_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },
9531 { 158 /* if */, Hexagon::V6_vS32b_qpred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9541 { 158 /* if */, Hexagon::V6_vS32b_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9543 { 158 /* if */, Hexagon::V6_vS32Ub_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9545 { 158 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9553 { 158 /* if */, Hexagon::V6_vL32b_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9574 { 158 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9584 { 158 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9586 { 158 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9594 { 158 /* if */, Hexagon::V6_vL32b_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9623 { 158 /* if */, Hexagon::S2_pstorerbt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
9633 { 158 /* if */, Hexagon::L2_ploadrbt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9635 { 158 /* if */, Hexagon::L2_ploadrubt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9654 { 158 /* if */, Hexagon::S2_pstorerbf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
9663 { 158 /* if */, Hexagon::L2_ploadrbf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9665 { 158 /* if */, Hexagon::L2_ploadrubf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9678 { 158 /* if */, Hexagon::V6_vS32b_nt_qpred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9684 { 158 /* if */, Hexagon::V6_vS32b_nt_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9685 { 158 /* if */, Hexagon::V6_vS32b_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9688 { 158 /* if */, Hexagon::V6_vL32b_cur_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9690 { 158 /* if */, Hexagon::V6_vL32b_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9692 { 158 /* if */, Hexagon::V6_vL32b_nt_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9710 { 158 /* if */, Hexagon::V6_vS32b_nt_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9716 { 158 /* if */, Hexagon::V6_vS32b_nt_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9717 { 158 /* if */, Hexagon::V6_vS32b_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9720 { 158 /* if */, Hexagon::V6_vL32b_cur_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9722 { 158 /* if */, Hexagon::V6_vL32b_tmp_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9724 { 158 /* if */, Hexagon::V6_vL32b_nt_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9757 { 158 /* if */, Hexagon::S2_pstorerbnewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9777 { 158 /* if */, Hexagon::S2_pstorerbtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
9786 { 158 /* if */, Hexagon::L2_ploadrbtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9788 { 158 /* if */, Hexagon::L2_ploadrubtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9802 { 158 /* if */, Hexagon::S2_pstorerbnewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9822 { 158 /* if */, Hexagon::S2_pstorerbfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
9831 { 158 /* if */, Hexagon::L2_ploadrbfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9833 { 158 /* if */, Hexagon::L2_ploadrubfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
9846 { 158 /* if */, Hexagon::V6_vS32b_nt_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9848 { 158 /* if */, Hexagon::V6_vL32b_nt_cur_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9850 { 158 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9866 { 158 /* if */, Hexagon::V6_vS32b_nt_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9868 { 158 /* if */, Hexagon::V6_vL32b_nt_cur_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9870 { 158 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9886 { 158 /* if */, Hexagon::S2_pstorerbnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9907 { 158 /* if */, Hexagon::S2_pstorerbnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9965 { 205 /* memb */, Hexagon::S2_storerb_pi, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
9973 { 205 /* memb */, Hexagon::S2_storerbnew_pi, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9981 { 205 /* memb */, Hexagon::S2_storerb_pci, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, },
9984 { 205 /* memb */, Hexagon::S2_storerbnew_pci, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
10187 { 312 /* vmem */, Hexagon::V6_vS32b_srls_ai, Convert__Reg1_2__s4_0Imm1_5, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, },
10188 { 312 /* vmem */, Hexagon::V6_vS32b_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
10194 { 312 /* vmem */, Hexagon::V6_vS32b_nt_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
10195 { 312 /* vmem */, Hexagon::V6_vS32b_new_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
10200 { 312 /* vmem */, Hexagon::V6_vS32b_nt_new_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
10204 { 317 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
10234 { 379 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },