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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 6413 case MCK_s3_0Imm: {
7404 case MCK_s3_0Imm: return "MCK_s3_0Imm";
8576 { 0 /* */, Hexagon::V6_vL32b_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
8577 { 0 /* */, Hexagon::V6_vL32Ub_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
8729 { 0 /* */, Hexagon::V6_vL32b_cur_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
8733 { 0 /* */, Hexagon::V6_vL32b_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
8740 { 0 /* */, Hexagon::V6_vL32b_nt_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9033 { 0 /* */, Hexagon::V6_vL32b_nt_cur_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9038 { 0 /* */, Hexagon::V6_vL32b_nt_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9615 { 158 /* if */, Hexagon::V6_vS32b_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9629 { 158 /* if */, Hexagon::V6_vS32b_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9630 { 158 /* if */, Hexagon::V6_vS32Ub_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9631 { 158 /* if */, Hexagon::V6_zLd_pred_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9640 { 158 /* if */, Hexagon::V6_vL32b_pred_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9646 { 158 /* if */, Hexagon::V6_vS32b_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9660 { 158 /* if */, Hexagon::V6_vS32b_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9661 { 158 /* if */, Hexagon::V6_vS32Ub_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
9670 { 158 /* if */, Hexagon::V6_vL32b_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9750 { 158 /* if */, Hexagon::V6_vS32b_nt_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9765 { 158 /* if */, Hexagon::V6_vS32b_nt_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9766 { 158 /* if */, Hexagon::V6_vS32b_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9773 { 158 /* if */, Hexagon::V6_vL32b_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9774 { 158 /* if */, Hexagon::V6_vL32b_tmp_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9775 { 158 /* if */, Hexagon::V6_vL32b_nt_pred_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9801 { 158 /* if */, Hexagon::V6_vS32b_nt_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9810 { 158 /* if */, Hexagon::V6_vS32b_nt_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
9811 { 158 /* if */, Hexagon::V6_vS32b_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9818 { 158 /* if */, Hexagon::V6_vL32b_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9819 { 158 /* if */, Hexagon::V6_vL32b_tmp_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },
9820 { 158 /* if */, Hexagon::V6_vL32b_nt_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9883 { 158 /* if */, Hexagon::V6_vS32b_nt_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9884 { 158 /* if */, Hexagon::V6_vL32b_nt_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9885 { 158 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9904 { 158 /* if */, Hexagon::V6_vS32b_nt_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
9905 { 158 /* if */, Hexagon::V6_vL32b_nt_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
9906 { 158 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, },
10192 { 312 /* vmem */, Hexagon::V6_vS32b_srls_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, },
10193 { 312 /* vmem */, Hexagon::V6_vS32b_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
10198 { 312 /* vmem */, Hexagon::V6_vS32b_nt_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, },
10199 { 312 /* vmem */, Hexagon::V6_vS32b_new_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
10202 { 312 /* vmem */, Hexagon::V6_vS32b_nt_new_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, },
10206 { 317 /* vmemu */, Hexagon::V6_vS32Ub_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
10236 { 379 /* z */, Hexagon::V6_zLd_pi, Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, },