|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 6406 case MCK_s32_0Imm: {
7403 case MCK_s32_0Imm: return "MCK_s32_0Imm";
7597 { 0 /* */, Hexagon::A2_tfrsi, Convert__Reg1_0__s32_0Imm1_3, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
8064 { 0 /* */, Hexagon::A4_combineir, Convert__Reg1_0__s32_0Imm1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, },
8065 { 0 /* */, Hexagon::A4_combineri, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8152 { 0 /* */, Hexagon::A2_addi, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8153 { 0 /* */, Hexagon::A2_andir, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8169 { 0 /* */, Hexagon::A2_orir, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8175 { 0 /* */, Hexagon::A2_subri, Convert__Reg1_0__s32_0Imm1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, },
8275 { 0 /* */, Hexagon::A2_combineii, Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, },
8276 { 0 /* */, Hexagon::TFRI64_V2_ext, Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, },
8280 { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8357 { 0 /* */, Hexagon::M2_accii, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8363 { 0 /* */, Hexagon::M2_naccii, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8379 { 0 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8390 { 0 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8405 { 0 /* */, Hexagon::C2_muxri, Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, },
8406 { 0 /* */, Hexagon::C2_muxir, Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8421 { 0 /* */, Hexagon::S4_or_andi, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8426 { 0 /* */, Hexagon::S4_or_ori, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8470 { 0 /* */, Hexagon::C2_cmpeqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8473 { 0 /* */, Hexagon::C2_cmpgti, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8478 { 0 /* */, Hexagon::A4_cmpheqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8479 { 0 /* */, Hexagon::A4_cmphgti, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8535 { 0 /* */, Hexagon::A4_rcmpeqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8546 { 0 /* */, Hexagon::C2_muxii, Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, },
8578 { 0 /* */, Hexagon::C4_cmpneqi, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8579 { 0 /* */, Hexagon::C4_cmpltei, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8618 { 0 /* */, Hexagon::A4_rcmpneqi, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8711 { 0 /* */, Hexagon::S4_addaddi, Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__41_ }, },
8714 { 0 /* */, Hexagon::S4_subaddi, Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_sub, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_, MCK__41_ }, },
8721 { 0 /* */, Hexagon::S4_or_andix, Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__41_ }, },
9352 { 158 /* if */, Hexagon::C2_cmoveit, Convert__Reg1_4__Reg1_2__s32_0Imm1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9357 { 158 /* if */, Hexagon::C2_cmoveif, Convert__Reg1_5__Reg1_3__s32_0Imm1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9391 { 158 /* if */, Hexagon::C2_cmovenewit, Convert__Reg1_6__Reg1_2__s32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9416 { 158 /* if */, Hexagon::C2_cmovenewif, Convert__Reg1_7__Reg1_3__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9418 { 158 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9421 { 158 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9423 { 158 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9438 { 158 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9441 { 158 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9443 { 158 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9470 { 158 /* if */, Hexagon::A2_paddit, Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
9511 { 158 /* if */, Hexagon::A2_paddif, Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
9556 { 158 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9559 { 158 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9561 { 158 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9597 { 158 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9600 { 158 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9602 { 158 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9622 { 158 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9625 { 158 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9627 { 158 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9645 { 158 /* if */, Hexagon::A2_padditnew, Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
9653 { 158 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9656 { 158 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9658 { 158 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9675 { 158 /* if */, Hexagon::A2_paddifnew, Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
9776 { 158 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9779 { 158 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9781 { 158 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9821 { 158 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9824 { 158 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9826 { 158 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9948 { 205 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9955 { 205 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__s32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, },
9964 { 205 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
9967 { 205 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__s32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
10004 { 234 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
10022 { 234 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
10058 { 239 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },
10074 { 239 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, },