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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 3698 return MCK_memd; // "memd"
6994 case MCK_memd: return "MCK_memd";
7621 { 0 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, },
7763 { 0 /* */, Hexagon::PS_loadrdabs, Convert__Reg1_0__u29_3Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, },
8286 { 0 /* */, Hexagon::L2_loadrdgp, Convert__Reg1_0__u29_3Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, },
8287 { 0 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__s29_3Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s29_3Imm, MCK__41_ }, },
8288 { 0 /* */, Hexagon::L2_loadrd_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, },
8289 { 0 /* */, Hexagon::L4_loadrd_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
8512 { 0 /* */, Hexagon::L2_loadrd_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, },
8593 { 0 /* */, Hexagon::L2_loadrd_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, },
8692 { 0 /* */, Hexagon::L4_loadrd_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, },
8765 { 0 /* */, Hexagon::L4_loadrd_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
8984 { 0 /* */, Hexagon::L2_loadrd_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },
9062 { 0 /* */, Hexagon::L2_loadrd_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },
9368 { 158 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9374 { 158 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, },
9394 { 158 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9399 { 158 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, },
9419 { 158 /* if */, Hexagon::S4_pstorerdt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9425 { 158 /* if */, Hexagon::L4_ploadrdt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
9439 { 158 /* if */, Hexagon::S4_pstorerdf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9445 { 158 /* if */, Hexagon::L4_ploadrdf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
9475 { 158 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9478 { 158 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, },
9516 { 158 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9519 { 158 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, },
9535 { 158 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9547 { 158 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, },
9557 { 158 /* if */, Hexagon::S4_pstorerdtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9563 { 158 /* if */, Hexagon::L4_ploadrdtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
9578 { 158 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9588 { 158 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, },
9598 { 158 /* if */, Hexagon::S4_pstorerdfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9604 { 158 /* if */, Hexagon::L4_ploadrdfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
9624 { 158 /* if */, Hexagon::S2_pstorerdt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9632 { 158 /* if */, Hexagon::L2_ploadrdt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, },
9655 { 158 /* if */, Hexagon::S2_pstorerdf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9662 { 158 /* if */, Hexagon::L2_ploadrdf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, },
9696 { 158 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9702 { 158 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, },
9728 { 158 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9734 { 158 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, },
9759 { 158 /* if */, Hexagon::S4_pstorerdt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9767 { 158 /* if */, Hexagon::L4_ploadrdt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, },
9778 { 158 /* if */, Hexagon::S2_pstorerdtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9785 { 158 /* if */, Hexagon::L2_ploadrdtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, },
9804 { 158 /* if */, Hexagon::S4_pstorerdf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9812 { 158 /* if */, Hexagon::L4_ploadrdf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, },
9823 { 158 /* if */, Hexagon::S2_pstorerdfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9830 { 158 /* if */, Hexagon::L2_ploadrdfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, },
9888 { 158 /* if */, Hexagon::S4_pstorerdtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9894 { 158 /* if */, Hexagon::L4_ploadrdtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, },
9909 { 158 /* if */, Hexagon::S4_pstorerdfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9915 { 158 /* if */, Hexagon::L4_ploadrdfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, },
9986 { 217 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9987 { 217 /* memd */, Hexagon::PS_storerdabs, Convert__u29_3Imm1_3__Reg1_6, AMFBS_None, { MCK_memd, MCK__40_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9988 { 217 /* memd */, Hexagon::S2_storerdgp, Convert__u29_3Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9989 { 217 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__s29_3Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9990 { 217 /* memd */, Hexagon::S2_storerd_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9991 { 217 /* memd */, Hexagon::S4_storerd_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9992 { 217 /* memd */, Hexagon::S2_storerd_pi, Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9993 { 217 /* memd */, Hexagon::S2_storerd_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9994 { 217 /* memd */, Hexagon::S4_storerd_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9995 { 217 /* memd */, Hexagon::S4_storerd_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9996 { 217 /* memd */, Hexagon::S2_storerd_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9997 { 217 /* memd */, Hexagon::S2_storerd_pci, Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, },