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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 5782 return MCK_memb_95_fifo; // "memb_fifo"
6991 case MCK_memb_95_fifo: return "MCK_memb_95_fifo";
7619 { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, },
8280 { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, },
8281 { 0 /* */, Hexagon::L2_loadalignb_pr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, },
8282 { 0 /* */, Hexagon::L4_loadalignb_ap, Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
8510 { 0 /* */, Hexagon::L2_loadalignb_pi, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, },
8591 { 0 /* */, Hexagon::L2_loadalignb_pbr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, },
8763 { 0 /* */, Hexagon::L4_loadalignb_ur, Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, },
8982 { 0 /* */, Hexagon::L2_loadalignb_pcr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },
9060 { 0 /* */, Hexagon::L2_loadalignb_pci, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, },