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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 3502 return MCK_lsr; // "lsr"
6984 case MCK_lsr: return "MCK_lsr";
7760 { 0 /* */, Hexagon::S2_lsr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, },
7895 { 0 /* */, Hexagon::S2_lsr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, },
8030 { 0 /* */, Hexagon::S2_lsr_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, },
8036 { 0 /* */, Hexagon::S2_lsr_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, },
8056 { 0 /* */, Hexagon::S2_lsr_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, },
8072 { 0 /* */, Hexagon::S2_lsr_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
8092 { 0 /* */, Hexagon::S2_lsr_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, },
8099 { 0 /* */, Hexagon::S2_lsr_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, },
8132 { 0 /* */, Hexagon::S2_lsr_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, },
8139 { 0 /* */, Hexagon::S2_lsr_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, },
8147 { 0 /* */, Hexagon::S2_lsr_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, },
8165 { 0 /* */, Hexagon::S2_lsr_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8186 { 0 /* */, Hexagon::S2_lsr_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, },
8261 { 0 /* */, Hexagon::S2_lsr_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
8265 { 0 /* */, Hexagon::S2_lsr_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
8271 { 0 /* */, Hexagon::S2_lsr_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
8331 { 0 /* */, Hexagon::S2_lsr_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
8335 { 0 /* */, Hexagon::S2_lsr_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, },
8355 { 0 /* */, Hexagon::S2_lsr_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8360 { 0 /* */, Hexagon::S2_lsr_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8366 { 0 /* */, Hexagon::S2_lsr_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8419 { 0 /* */, Hexagon::S2_lsr_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8425 { 0 /* */, Hexagon::S2_lsr_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, },
8825 { 0 /* */, Hexagon::S4_addi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, },
8830 { 0 /* */, Hexagon::S4_andi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, },
8848 { 0 /* */, Hexagon::S4_ori_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, },
8850 { 0 /* */, Hexagon::S4_subi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, },