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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 9392 { 158 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, },
9393 { 158 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, },
9394 { 158 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, },
9395 { 158 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, },
9396 { 158 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, },
9397 { 158 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, },
9398 { 158 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, },
9505 { 158 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9506 { 158 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, },
9507 { 158 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },
9508 { 158 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, },