reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/BPF/BPFGenAsmMatcher.inc
  385   MCK_LAST_REGISTER = MCK_GPR32,
  600     case BPF::W0: OpKind = MCK_GPR32; break;
  602     case BPF::W1: OpKind = MCK_GPR32; break;
  604     case BPF::W2: OpKind = MCK_GPR32; break;
  606     case BPF::W3: OpKind = MCK_GPR32; break;
  608     case BPF::W4: OpKind = MCK_GPR32; break;
  610     case BPF::W5: OpKind = MCK_GPR32; break;
  612     case BPF::W6: OpKind = MCK_GPR32; break;
  614     case BPF::W7: OpKind = MCK_GPR32; break;
  616     case BPF::W8: OpKind = MCK_GPR32; break;
  618     case BPF::W9: OpKind = MCK_GPR32; break;
  620     case BPF::W10: OpKind = MCK_GPR32; break;
  622     case BPF::W11: OpKind = MCK_GPR32; break;
  679   case MCK_GPR32: return "MCK_GPR32";
  770   { 0 /*  */, BPF::MOV_rr_32, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_GPR32 }, },
  770   { 0 /*  */, BPF::MOV_rr_32, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_GPR32 }, },
  771   { 0 /*  */, BPF::MOV_ri_32, Convert__Reg1_0__Imm1_2, AMFBS_None, { MCK_GPR32, MCK__61_, MCK_Imm }, },
  794   { 0 /*  */, BPF::AND_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__38_, MCK__61_, MCK_GPR32 }, },
  794   { 0 /*  */, BPF::AND_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__38_, MCK__61_, MCK_GPR32 }, },
  795   { 0 /*  */, BPF::AND_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__38_, MCK__61_, MCK_Imm }, },
  796   { 0 /*  */, BPF::MUL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__STAR_, MCK__61_, MCK_GPR32 }, },
  796   { 0 /*  */, BPF::MUL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__STAR_, MCK__61_, MCK_GPR32 }, },
  797   { 0 /*  */, BPF::MUL_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__STAR_, MCK__61_, MCK_Imm }, },
  798   { 0 /*  */, BPF::ADD_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__43_, MCK__61_, MCK_GPR32 }, },
  798   { 0 /*  */, BPF::ADD_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__43_, MCK__61_, MCK_GPR32 }, },
  799   { 0 /*  */, BPF::ADD_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__43_, MCK__61_, MCK_Imm }, },
  800   { 0 /*  */, BPF::SUB_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__MINUS_, MCK__61_, MCK_GPR32 }, },
  800   { 0 /*  */, BPF::SUB_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__MINUS_, MCK__61_, MCK_GPR32 }, },
  801   { 0 /*  */, BPF::SUB_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__MINUS_, MCK__61_, MCK_Imm }, },
  802   { 0 /*  */, BPF::DIV_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__47_, MCK__61_, MCK_GPR32 }, },
  802   { 0 /*  */, BPF::DIV_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__47_, MCK__61_, MCK_GPR32 }, },
  803   { 0 /*  */, BPF::DIV_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__47_, MCK__61_, MCK_Imm }, },
  804   { 0 /*  */, BPF::NEG_32, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__MINUS_, MCK_GPR32 }, },
  804   { 0 /*  */, BPF::NEG_32, Convert__Reg1_0__Tie0_0_3, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__MINUS_, MCK_GPR32 }, },
  805   { 0 /*  */, BPF::XOR_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__94_, MCK__61_, MCK_GPR32 }, },
  805   { 0 /*  */, BPF::XOR_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__94_, MCK__61_, MCK_GPR32 }, },
  806   { 0 /*  */, BPF::XOR_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__94_, MCK__61_, MCK_Imm }, },
  807   { 0 /*  */, BPF::OR_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__124_, MCK__61_, MCK_GPR32 }, },
  807   { 0 /*  */, BPF::OR_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_3, AMFBS_None, { MCK_GPR32, MCK__124_, MCK__61_, MCK_GPR32 }, },
  808   { 0 /*  */, BPF::OR_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_3, AMFBS_None, { MCK_GPR32, MCK__124_, MCK__61_, MCK_Imm }, },
  813   { 0 /*  */, BPF::SLL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK__LT_, MCK__LT_, MCK__61_, MCK_GPR32 }, },
  813   { 0 /*  */, BPF::SLL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK__LT_, MCK__LT_, MCK__61_, MCK_GPR32 }, },
  814   { 0 /*  */, BPF::SLL_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR32, MCK__LT_, MCK__LT_, MCK__61_, MCK_Imm }, },
  815   { 0 /*  */, BPF::SRL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR32 }, },
  815   { 0 /*  */, BPF::SRL_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_4, AMFBS_None, { MCK_GPR32, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR32 }, },
  816   { 0 /*  */, BPF::SRL_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_4, AMFBS_None, { MCK_GPR32, MCK__GT_, MCK__GT_, MCK__61_, MCK_Imm }, },
  819   { 0 /*  */, BPF::SRA_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_None, { MCK_GPR32, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR32 }, },
  819   { 0 /*  */, BPF::SRA_rr_32, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_None, { MCK_GPR32, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_GPR32 }, },
  820   { 0 /*  */, BPF::SRA_ri_32, Convert__Reg1_0__Tie0_0_0__Imm1_5, AMFBS_None, { MCK_GPR32, MCK_s, MCK__GT_, MCK__GT_, MCK__61_, MCK_Imm }, },
  825   { 0 /*  */, BPF::LDH32, Convert__Reg1_0__Reg1_8__Imm1_9, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_ }, },
  826   { 0 /*  */, BPF::LDW32, Convert__Reg1_0__Reg1_8__Imm1_9, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_ }, },
  827   { 0 /*  */, BPF::LDB32, Convert__Reg1_0__Reg1_8__Imm1_9, AMFBS_None, { MCK_GPR32, MCK__61_, MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_ }, },
  829   { 1 /* * */, BPF::STH32, Convert__Reg1_10__Reg1_6__Imm1_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u16, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_, MCK__61_, MCK_GPR32 }, },
  831   { 1 /* * */, BPF::STW32, Convert__Reg1_10__Reg1_6__Imm1_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_, MCK__61_, MCK_GPR32 }, },
  834   { 1 /* * */, BPF::STB32, Convert__Reg1_10__Reg1_6__Imm1_7, AMFBS_None, { MCK__STAR_, MCK__40_, MCK_u8, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_, MCK__61_, MCK_GPR32 }, },
  843   { 24 /* if */, BPF::JULT_rr_32, Convert__Reg1_1__Reg1_3__Imm1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  843   { 24 /* if */, BPF::JULT_rr_32, Convert__Reg1_1__Reg1_3__Imm1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  844   { 24 /* if */, BPF::JULT_ri_32, Convert__Reg1_1__Imm1_3__Imm1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK_Imm, MCK_goto, MCK_Imm }, },
  845   { 24 /* if */, BPF::JUGT_rr_32, Convert__Reg1_1__Reg1_3__Imm1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  845   { 24 /* if */, BPF::JUGT_rr_32, Convert__Reg1_1__Reg1_3__Imm1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  846   { 24 /* if */, BPF::JUGT_ri_32, Convert__Reg1_1__Imm1_3__Imm1_5, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK_Imm, MCK_goto, MCK_Imm }, },
  859   { 24 /* if */, BPF::JNE_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__EXCLAIM_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  859   { 24 /* if */, BPF::JNE_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__EXCLAIM_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  860   { 24 /* if */, BPF::JNE_ri_32, Convert__Reg1_1__Imm1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__EXCLAIM_, MCK__61_, MCK_Imm, MCK_goto, MCK_Imm }, },
  861   { 24 /* if */, BPF::JULE_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  861   { 24 /* if */, BPF::JULE_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  862   { 24 /* if */, BPF::JULE_ri_32, Convert__Reg1_1__Imm1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__LT_, MCK__61_, MCK_Imm, MCK_goto, MCK_Imm }, },
  863   { 24 /* if */, BPF::JEQ_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__61_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  863   { 24 /* if */, BPF::JEQ_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__61_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  864   { 24 /* if */, BPF::JEQ_ri_32, Convert__Reg1_1__Imm1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__61_, MCK__61_, MCK_Imm, MCK_goto, MCK_Imm }, },
  865   { 24 /* if */, BPF::JUGE_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  865   { 24 /* if */, BPF::JUGE_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  866   { 24 /* if */, BPF::JUGE_ri_32, Convert__Reg1_1__Imm1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK__GT_, MCK__61_, MCK_Imm, MCK_goto, MCK_Imm }, },
  867   { 24 /* if */, BPF::JSLT_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  867   { 24 /* if */, BPF::JSLT_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  868   { 24 /* if */, BPF::JSLT_ri_32, Convert__Reg1_1__Imm1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK_Imm, MCK_goto, MCK_Imm }, },
  869   { 24 /* if */, BPF::JSGT_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  869   { 24 /* if */, BPF::JSGT_rr_32, Convert__Reg1_1__Reg1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  870   { 24 /* if */, BPF::JSGT_ri_32, Convert__Reg1_1__Imm1_4__Imm1_6, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK_Imm, MCK_goto, MCK_Imm }, },
  875   { 24 /* if */, BPF::JSLE_rr_32, Convert__Reg1_1__Reg1_5__Imm1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  875   { 24 /* if */, BPF::JSLE_rr_32, Convert__Reg1_1__Reg1_5__Imm1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  876   { 24 /* if */, BPF::JSLE_ri_32, Convert__Reg1_1__Imm1_5__Imm1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__LT_, MCK__61_, MCK_Imm, MCK_goto, MCK_Imm }, },
  877   { 24 /* if */, BPF::JSGE_rr_32, Convert__Reg1_1__Reg1_5__Imm1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  877   { 24 /* if */, BPF::JSGE_rr_32, Convert__Reg1_1__Reg1_5__Imm1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK__61_, MCK_GPR32, MCK_goto, MCK_Imm }, },
  878   { 24 /* if */, BPF::JSGE_ri_32, Convert__Reg1_1__Imm1_5__Imm1_7, AMFBS_None, { MCK_if, MCK_GPR32, MCK_s, MCK__GT_, MCK__61_, MCK_Imm, MCK_goto, MCK_Imm }, },
  882   { 41 /* lock */, BPF::XADDW32, Convert__Reg1_12__Reg1_7__Imm1_8__Tie0_12_12, AMFBS_None, { MCK_lock, MCK__STAR_, MCK__40_, MCK_u32, MCK__STAR_, MCK__41_, MCK__40_, MCK_GPR, MCK_Imm, MCK__41_, MCK__43_, MCK__61_, MCK_GPR32 }, },