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reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
 9774   if ((FB[ARM::HasMVEIntegerOps]))
gen/lib/Target/ARM/ARMGenAsmWriter.inc
12174         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12189         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12204         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12219         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12234         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12249         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12264         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12279         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12294         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12309         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12324         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12339         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12356         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12373         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12390         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12407         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12424         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12441         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12458         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12475         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12490         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12507         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12524         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12541         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
12558         STI.getFeatureBits()[ARM::HasMVEIntegerOps] &&
gen/lib/Target/ARM/ARMGenDisassemblerTables.inc
16619     return (Bits[ARM::HasMVEIntegerOps]);
16621     return (Bits[ARM::HasV8_1MMainlineOps] && Bits[ARM::HasMVEIntegerOps]);
gen/lib/Target/ARM/ARMGenSubtargetInfo.inc
  301   { "mve", "Support M-Class Vector Extension with integer ops", ARM::HasMVEIntegerOps, { { { 0x3000400000000000ULL, 0x0ULL, 0x800ULL, } } } },
19508   if (Bits[ARM::HasMVEIntegerOps]) HasMVEIntegerOps = true;
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  499     return getSTI().getFeatureBits()[ARM::HasMVEIntegerOps];
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
 6293     if (!featureBits[ARM::HasMVEIntegerOps] && !featureBits[ARM::FeatureVFP2])
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
  573     if (STI.getFeatureBits()[ARM::HasMVEIntegerOps])
lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
  269   else if (STI.hasFeature(ARM::HasMVEIntegerOps))