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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmWriter.inc12580 MRI.getRegClass(ARM::GPRwithZRnospRegClassID).contains(MI->getOperand(1).getReg()) &&
12604 MRI.getRegClass(ARM::GPRwithZRnospRegClassID).contains(MI->getOperand(1).getReg()) &&
12618 MRI.getRegClass(ARM::GPRwithZRnospRegClassID).contains(MI->getOperand(1).getReg()) &&
gen/lib/Target/ARM/ARMGenInstrInfo.inc 5775 static const MCOperandInfo OperandInfo463[] = { { ARM::rGPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRwithZRnospRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRwithZRnospRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
5775 static const MCOperandInfo OperandInfo463[] = { { ARM::rGPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRwithZRnospRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { ARM::GPRwithZRnospRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 2901 { GPRwithZRnosp, GPRwithZRnospBits, 2442, 15, sizeof(GPRwithZRnospBits), ARM::GPRwithZRnospRegClassID, 1, true },
6017 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRnospRegClassID];
6666 &ARMMCRegisterClasses[GPRwithZRnospRegClassID],