reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5905 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::HPRRegClassID]; 5923 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::SPRRegClassID]; 5942 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRRegClassID]; 5961 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithAPSRRegClassID]; 5979 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRRegClassID]; 5998 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnopcRegClassID]; 6017 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRnospRegClassID]; 6036 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::rGPRRegClassID]; 6054 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREvenRegClassID]; 6070 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPROddRegClassID]; 6086 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tcGPRRegClassID]; 6102 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPREvenRegClassID]; 6118 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPROddRegClassID]; 6134 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tcGPRRegClassID]; 6150 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tcGPRRegClassID]; 6165 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::hGPR_and_tGPROddRegClassID]; 6181 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tGPR_and_tcGPRRegClassID]; 6197 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPROdd_and_tcGPRRegClassID]; 6212 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::hGPR_and_tcGPRRegClassID]; 6229 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPRRegClassID]; 6247 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPairRegClassID]; 6265 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_0RegClassID]; 6283 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QPRRegClassID]; 6301 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_2RegClassID]; 6319 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_0_in_DPR_8RegClassID]; 6337 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_1_in_DPR_8RegClassID]; 6352 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQPRRegClassID]; 6366 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DQuad_with_qsub_0_in_MQPRRegClassID]; 6380 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DQuad_with_qsub_1_in_MQPRRegClassID]; 6394 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DQuad_with_qsub_0_in_QPR_8RegClassID]; 6408 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DQuad_with_qsub_1_in_QPR_8RegClassID]; 6422 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPRRegClassID]; 6436 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_0RegClassID]; 6450 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_4RegClassID]; 6464 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_8RegClassID]; 6478 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_12RegClassID]; 6492 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_dsub_0_in_DPR_8RegClassID]; 6506 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_dsub_2_in_DPR_8RegClassID]; 6520 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_dsub_4_in_DPR_8RegClassID]; 6534 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_dsub_6_in_DPR_8RegClassID]; 6546 &ARMMCRegisterClasses[HPRRegClassID], 6558 &ARMMCRegisterClasses[FPWithVPRRegClassID], 6570 &ARMMCRegisterClasses[SPRRegClassID], 6582 &ARMMCRegisterClasses[FPWithVPR_with_ssub_0RegClassID], 6594 &ARMMCRegisterClasses[GPRRegClassID], 6606 &ARMMCRegisterClasses[GPRwithAPSRRegClassID], 6618 &ARMMCRegisterClasses[GPRwithZRRegClassID], 6630 &ARMMCRegisterClasses[SPR_8RegClassID], 6642 &ARMMCRegisterClasses[GPRnopcRegClassID], 6654 &ARMMCRegisterClasses[GPRwithAPSRnospRegClassID], 6666 &ARMMCRegisterClasses[GPRwithZRnospRegClassID], 6678 &ARMMCRegisterClasses[rGPRRegClassID], 6690 &ARMMCRegisterClasses[tGPRwithpcRegClassID], 6702 &ARMMCRegisterClasses[FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID], 6714 &ARMMCRegisterClasses[hGPRRegClassID], 6726 &ARMMCRegisterClasses[tGPRRegClassID], 6738 &ARMMCRegisterClasses[tGPREvenRegClassID], 6750 &ARMMCRegisterClasses[GPRnopc_and_hGPRRegClassID], 6762 &ARMMCRegisterClasses[GPRwithAPSRnosp_and_hGPRRegClassID], 6774 &ARMMCRegisterClasses[tGPROddRegClassID], 6786 &ARMMCRegisterClasses[tcGPRRegClassID], 6798 &ARMMCRegisterClasses[hGPR_and_tGPREvenRegClassID], 6810 &ARMMCRegisterClasses[tGPR_and_tGPREvenRegClassID], 6822 &ARMMCRegisterClasses[tGPR_and_tGPROddRegClassID], 6834 &ARMMCRegisterClasses[tGPR_and_tcGPRRegClassID], 6846 &ARMMCRegisterClasses[tGPREven_and_tcGPRRegClassID], 6858 &ARMMCRegisterClasses[hGPR_and_tGPROddRegClassID], 6870 &ARMMCRegisterClasses[tGPREven_and_tGPR_and_tcGPRRegClassID], 6882 &ARMMCRegisterClasses[tGPROdd_and_tcGPRRegClassID], 6894 &ARMMCRegisterClasses[CCRRegClassID], 6906 &ARMMCRegisterClasses[GPRlrRegClassID], 6918 &ARMMCRegisterClasses[GPRspRegClassID], 6930 &ARMMCRegisterClasses[VCCRRegClassID], 6942 &ARMMCRegisterClasses[cl_FPSCR_NZCVRegClassID], 6954 &ARMMCRegisterClasses[hGPR_and_tGPRwithpcRegClassID], 6966 &ARMMCRegisterClasses[hGPR_and_tcGPRRegClassID], 6978 &ARMMCRegisterClasses[DPRRegClassID], 6990 &ARMMCRegisterClasses[DPR_VFP2RegClassID], 7002 &ARMMCRegisterClasses[DPR_8RegClassID], 7014 &ARMMCRegisterClasses[GPRPairRegClassID], 7026 &ARMMCRegisterClasses[GPRPairnospRegClassID], 7038 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tGPRRegClassID], 7050 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_hGPRRegClassID], 7062 &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tcGPRRegClassID], 7074 &ARMMCRegisterClasses[GPRPair_with_gsub_1_in_tcGPRRegClassID], 7086 &ARMMCRegisterClasses[GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID], 7098 &ARMMCRegisterClasses[GPRPair_with_gsub_1_in_GPRspRegClassID], 7110 &ARMMCRegisterClasses[DPairSpcRegClassID], 7122 &ARMMCRegisterClasses[DPairSpc_with_ssub_0RegClassID], 7134 &ARMMCRegisterClasses[DPairSpc_with_ssub_4RegClassID], 7146 &ARMMCRegisterClasses[DPairSpc_with_dsub_0_in_DPR_8RegClassID], 7158 &ARMMCRegisterClasses[DPairSpc_with_dsub_2_in_DPR_8RegClassID], 7170 &ARMMCRegisterClasses[DPairRegClassID], 7182 &ARMMCRegisterClasses[DPair_with_ssub_0RegClassID], 7194 &ARMMCRegisterClasses[QPRRegClassID], 7206 &ARMMCRegisterClasses[DPair_with_ssub_2RegClassID], 7218 &ARMMCRegisterClasses[DPair_with_dsub_0_in_DPR_8RegClassID], 7230 &ARMMCRegisterClasses[MQPRRegClassID], 7242 &ARMMCRegisterClasses[QPR_VFP2RegClassID], 7254 &ARMMCRegisterClasses[DPair_with_dsub_1_in_DPR_8RegClassID], 7266 &ARMMCRegisterClasses[QPR_8RegClassID], 7278 &ARMMCRegisterClasses[DTripleRegClassID], 7290 &ARMMCRegisterClasses[DTripleSpcRegClassID], 7302 &ARMMCRegisterClasses[DTripleSpc_with_ssub_0RegClassID], 7314 &ARMMCRegisterClasses[DTriple_with_ssub_0RegClassID], 7326 &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPRRegClassID], 7338 &ARMMCRegisterClasses[DTriple_with_ssub_2RegClassID], 7350 &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], 7362 &ARMMCRegisterClasses[DTripleSpc_with_ssub_4RegClassID], 7374 &ARMMCRegisterClasses[DTriple_with_ssub_4RegClassID], 7386 &ARMMCRegisterClasses[DTripleSpc_with_ssub_8RegClassID], 7398 &ARMMCRegisterClasses[DTripleSpc_with_dsub_0_in_DPR_8RegClassID], 7410 &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8RegClassID], 7422 &ARMMCRegisterClasses[DTriple_with_qsub_0_in_MQPRRegClassID], 7434 &ARMMCRegisterClasses[DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], 7446 &ARMMCRegisterClasses[DTriple_with_dsub_1_in_DPR_8RegClassID], 7458 &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], 7470 &ARMMCRegisterClasses[DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID], 7482 &ARMMCRegisterClasses[DTripleSpc_with_dsub_2_in_DPR_8RegClassID], 7494 &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8RegClassID], 7506 &ARMMCRegisterClasses[DTripleSpc_with_dsub_4_in_DPR_8RegClassID], 7518 &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], 7530 &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPR_8RegClassID], 7542 &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID], 7554 &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID], 7566 &ARMMCRegisterClasses[DQuadSpcRegClassID], 7578 &ARMMCRegisterClasses[DQuadSpc_with_ssub_0RegClassID], 7590 &ARMMCRegisterClasses[DQuadSpc_with_ssub_4RegClassID], 7602 &ARMMCRegisterClasses[DQuadSpc_with_ssub_8RegClassID], 7614 &ARMMCRegisterClasses[DQuadSpc_with_dsub_0_in_DPR_8RegClassID], 7626 &ARMMCRegisterClasses[DQuadSpc_with_dsub_2_in_DPR_8RegClassID], 7638 &ARMMCRegisterClasses[DQuadSpc_with_dsub_4_in_DPR_8RegClassID], 7650 &ARMMCRegisterClasses[DQuadRegClassID], 7662 &ARMMCRegisterClasses[DQuad_with_ssub_0RegClassID], 7674 &ARMMCRegisterClasses[DQuad_with_ssub_2RegClassID], 7686 &ARMMCRegisterClasses[QQPRRegClassID], 7698 &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], 7710 &ARMMCRegisterClasses[DQuad_with_ssub_4RegClassID], 7722 &ARMMCRegisterClasses[DQuad_with_ssub_6RegClassID], 7734 &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8RegClassID], 7746 &ARMMCRegisterClasses[DQuad_with_qsub_0_in_MQPRRegClassID], 7758 &ARMMCRegisterClasses[DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], 7770 &ARMMCRegisterClasses[DQuad_with_dsub_1_in_DPR_8RegClassID], 7782 &ARMMCRegisterClasses[DQuad_with_qsub_1_in_MQPRRegClassID], 7794 &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], 7806 &ARMMCRegisterClasses[DQuad_with_dsub_2_in_DPR_8RegClassID], 7818 &ARMMCRegisterClasses[DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], 7830 &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8RegClassID], 7842 &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], 7854 &ARMMCRegisterClasses[DQuad_with_qsub_0_in_QPR_8RegClassID], 7866 &ARMMCRegisterClasses[DQuad_with_qsub_1_in_QPR_8RegClassID], 7878 &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID], 7890 &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], 7902 &ARMMCRegisterClasses[QQQQPRRegClassID], 7914 &ARMMCRegisterClasses[QQQQPR_with_ssub_0RegClassID], 7926 &ARMMCRegisterClasses[QQQQPR_with_ssub_4RegClassID], 7938 &ARMMCRegisterClasses[QQQQPR_with_ssub_8RegClassID], 7950 &ARMMCRegisterClasses[QQQQPR_with_ssub_12RegClassID], 7962 &ARMMCRegisterClasses[QQQQPR_with_dsub_0_in_DPR_8RegClassID], 7974 &ARMMCRegisterClasses[QQQQPR_with_dsub_2_in_DPR_8RegClassID], 7986 &ARMMCRegisterClasses[QQQQPR_with_dsub_4_in_DPR_8RegClassID], 7998 &ARMMCRegisterClasses[QQQQPR_with_dsub_6_in_DPR_8RegClassID], 15961 ARMMCRegisterClasses, 122,