reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

gen/lib/Target/ARM/ARMGenRegisterInfo.inc
   16 extern const MCRegisterClass ARMMCRegisterClasses[];

References

gen/lib/Target/ARM/ARMGenRegisterInfo.inc
 3524   RI->InitMCRegisterInfo(ARMRegDesc, 295, RA, PC, ARMMCRegisterClasses, 122, ARMRegUnitRoots, 83, ARMRegDiffLists, ARMLaneMaskLists, ARMRegStrings, ARMRegClassStrings, ARMSubRegIdxLists, 57,
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 1294         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum) &&
 1295         !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Memory.BaseRegNum))
 1298         !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(
 1307         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum))
 1310         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.OffsetRegNum))
 1317            ARMMCRegisterClasses[ARM::GPRRegClassID].contains(
 1319            ARMMCRegisterClasses[ARM::GPRRegClassID].contains(
 1324            ARMMCRegisterClasses[ARM::GPRRegClassID].contains(
 1377            ARMMCRegisterClasses[ARM::GPRRegClassID].contains(PostIdxReg.RegNum);
 1393     if (!ARMMCRegisterClasses[ARM::GPRnopcRegClassID].contains(
 1405     if (!ARMMCRegisterClasses[ARM::rGPRRegClassID].contains(
 1417     if (!ARMMCRegisterClasses[ARM::tGPRRegClassID].contains(
 1703         !ARMMCRegisterClasses[ARM::GPRnopcRegClassID].contains(
 1736         !ARMMCRegisterClasses[RegClassID].contains(Memory.BaseRegNum))
 1765     if (!ARMMCRegisterClasses[ARM::GPRnopcRegClassID].contains(
 1768     if (!ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(
 1786     if (!ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(
 1897            ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(
 1903     return (ARMMCRegisterClasses[ARM::DPairRegClassID]
 1920     return (ARMMCRegisterClasses[ARM::DPairSpcRegClassID]
 1936            ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(
 1955     return (ARMMCRegisterClasses[ARM::DPairRegClassID]
 3173     const MCRegisterClass *RC_in = &ARMMCRegisterClasses[ARM::MQPRRegClassID];
 3175       &ARMMCRegisterClasses[ARM::QQPRRegClassID] :
 3176       &ARMMCRegisterClasses[ARM::QQQQPRRegClassID];
 3539     if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(
 3545     } else if (ARMMCRegisterClasses[ARM::SPRRegClassID].contains(
 4247   if (!ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg))
 4302   if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) {
 4309   if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg))
 4310     RC = &ARMMCRegisterClasses[ARM::GPRRegClassID];
 4311   else if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg))
 4312     RC = &ARMMCRegisterClasses[ARM::DPRRegClassID];
 4313   else if (ARMMCRegisterClasses[ARM::SPRRegClassID].contains(Reg))
 4314     RC = &ARMMCRegisterClasses[ARM::SPRRegClassID];
 4315   else if (ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID].contains(Reg))
 4316     RC = &ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID];
 4336       if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg))
 4370     if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) {
 4375         RC->getID() == ARMMCRegisterClasses[ARM::GPRRegClassID].getID() &&
 4376         ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID].contains(Reg)) {
 4379       RC = &ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID];
 4382         (RC == &ARMMCRegisterClasses[ARM::SPRRegClassID] ||
 4383          RC == &ARMMCRegisterClasses[ARM::DPRRegClassID] ||
 4384          RC == &ARMMCRegisterClasses[ARM::FPWithVPRRegClassID])) {
 4385       RC = &ARMMCRegisterClasses[ARM::FPWithVPRRegClassID];
 4402       if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg))
 4404       else if (!ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID].contains(Reg))
 4408     if (RC != &ARMMCRegisterClasses[ARM::GPRRegClassID] &&
 4409         RC != &ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID] &&
 4507     if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg)) {
 4527     if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) {
 4535                                    &ARMMCRegisterClasses[ARM::DPairRegClassID]);
 4540                                    &ARMMCRegisterClasses[ARM::DPairRegClassID]);
 4571   if (hasMVE() && !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Reg)) {
 4577   else if (!hasMVE() && ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) {
 4607       if (!hasMVE() && ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg))
 4615            !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(EndReg)) ||
 4617            !ARMMCRegisterClasses[ARM::DPRRegClassID].contains(EndReg))) {
 4652       if (!ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Reg)) {
 4664     else if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) {
 4730         &ARMMCRegisterClasses[ARM::DPairRegClassID] :
 4731         &ARMMCRegisterClasses[ARM::DPairSpcRegClassID];
 6632         (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(
 6634          ARMMCRegisterClasses[ARM::QPRRegClassID].contains(
 6659            (ARMMCRegisterClasses[ARM::SPRRegClassID].contains(
 6661             ARMMCRegisterClasses[ARM::DPRRegClassID].contains(
 6674            (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(
 7839           !ARMMCRegisterClasses[ARM::GPRwithAPSRnospRegClassID].contains(
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
 1130       if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg))
 1132       else if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg)) {
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
 1721   bool SPRRegs = ARMMCRegisterClasses[ARM::SPRRegClassID].contains(Reg);
 1722   bool DPRRegs = ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg);