|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 6356 { 523, 4, 0, 0, 905, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #523 = t2LDRBpcrel
6358 { 525, 4, 0, 0, 905, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #525 = t2LDRHpcrel
6359 { 526, 4, 0, 0, 398, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #526 = t2LDRSBpcrel
6360 { 527, 4, 0, 0, 398, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #527 = t2LDRSHpcrel
6597 { 764, 4, 1, 4, 724, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #764 = MRSbanked
9603 { 3770, 4, 0, 4, 51, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr }, // Inst #3770 = t2CMNri
9606 { 3773, 4, 0, 4, 281, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr }, // Inst #3773 = t2CMPri
9670 { 3837, 4, 1, 4, 391, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #3837 = t2LDRBpci
9684 { 3851, 4, 1, 4, 391, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #3851 = t2LDRHpci
9691 { 3858, 4, 1, 4, 399, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #3858 = t2LDRSBpci
9698 { 3865, 4, 1, 4, 399, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #3865 = t2LDRSHpci