|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 9958 { 4125, 6, 2, 2, 37, 0|(1ULL<<MCID::Add)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasOptionalDef)|(1ULL<<MCID::UnmodeledSideEffects), 0x80c80ULL, ImplicitList1, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4125 = tADC
9968 { 4135, 6, 2, 2, 313, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4135 = tAND
9970 { 4137, 6, 2, 2, 879, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4137 = tASRrr
9972 { 4139, 6, 2, 2, 313, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4139 = tBIC
9988 { 4155, 6, 2, 2, 313, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4155 = tEOR
10006 { 4173, 6, 2, 2, 879, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4173 = tLSLrr
10008 { 4175, 6, 2, 2, 879, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4175 = tLSRrr
10014 { 4181, 6, 2, 2, 313, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4181 = tORR
10021 { 4188, 6, 2, 2, 878, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef), 0x80c80ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4188 = tROR
10023 { 4190, 6, 2, 2, 37, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasOptionalDef)|(1ULL<<MCID::UnmodeledSideEffects), 0x80c80ULL, ImplicitList1, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4190 = tSBC