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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 9717 { 3884, 6, 1, 4, 375, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3884 = t2MLA
9718 { 3885, 6, 1, 4, 375, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3885 = t2MLS
9802 { 3969, 6, 1, 4, 378, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3969 = t2SMLABB
9803 { 3970, 6, 1, 4, 378, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3970 = t2SMLABT
9804 { 3971, 6, 1, 4, 380, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3971 = t2SMLAD
9805 { 3972, 6, 1, 4, 380, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3972 = t2SMLADX
9813 { 3980, 6, 1, 4, 378, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3980 = t2SMLATB
9814 { 3981, 6, 1, 4, 378, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3981 = t2SMLATT
9815 { 3982, 6, 1, 4, 378, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3982 = t2SMLAWB
9816 { 3983, 6, 1, 4, 378, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3983 = t2SMLAWT
9817 { 3984, 6, 1, 4, 379, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3984 = t2SMLSD
9818 { 3985, 6, 1, 4, 379, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3985 = t2SMLSDX
9821 { 3988, 6, 1, 4, 375, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3988 = t2SMMLA
9822 { 3989, 6, 1, 4, 375, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3989 = t2SMMLAR
9823 { 3990, 6, 1, 4, 375, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3990 = t2SMMLS
9824 { 3991, 6, 1, 4, 375, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3991 = t2SMMLSR
9831 { 3998, 6, 2, 4, 382, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3998 = t2SMULL
9937 { 4104, 6, 2, 4, 382, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #4104 = t2UMULL
9945 { 4112, 6, 1, 4, 681, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #4112 = t2USADA8