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|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 8860 { 3027, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3027 = VQSHLsiv1i64
8861 { 3028, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3028 = VQSHLsiv2i32
8863 { 3030, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3030 = VQSHLsiv4i16
8866 { 3033, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3033 = VQSHLsiv8i8
8868 { 3035, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3035 = VQSHLsuv1i64
8869 { 3036, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3036 = VQSHLsuv2i32
8871 { 3038, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3038 = VQSHLsuv4i16
8874 { 3041, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3041 = VQSHLsuv8i8
8884 { 3051, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3051 = VQSHLuiv1i64
8885 { 3052, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3052 = VQSHLuiv2i32
8887 { 3054, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3054 = VQSHLuiv4i16
8890 { 3057, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3057 = VQSHLuiv8i8
9101 { 3268, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3268 = VSHLiv1i64
9102 { 3269, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3269 = VSHLiv2i32
9104 { 3271, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3271 = VSHLiv4i16
9107 { 3274, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3274 = VSHLiv8i8