|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 8859 { 3026, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3026 = VQSHLsiv16i8
8862 { 3029, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3029 = VQSHLsiv2i64
8864 { 3031, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3031 = VQSHLsiv4i32
8865 { 3032, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3032 = VQSHLsiv8i16
8867 { 3034, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3034 = VQSHLsuv16i8
8870 { 3037, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3037 = VQSHLsuv2i64
8872 { 3039, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3039 = VQSHLsuv4i32
8873 { 3040, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3040 = VQSHLsuv8i16
8883 { 3050, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3050 = VQSHLuiv16i8
8886 { 3053, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3053 = VQSHLuiv2i64
8888 { 3055, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3055 = VQSHLuiv4i32
8889 { 3056, 5, 1, 4, 978, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3056 = VQSHLuiv8i16
9100 { 3267, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3267 = VSHLiv16i8
9103 { 3270, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3270 = VSHLiv2i64
9105 { 3272, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3272 = VSHLiv4i32
9106 { 3273, 5, 1, 4, 977, 0|(1ULL<<MCID::Predicable), 0x11180ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3273 = VSHLiv8i16