|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 8276 { 2443, 9, 2, 4, 626, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2443 = VLD2LNq16Pseudo_UPD
8280 { 2447, 9, 2, 4, 626, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2447 = VLD2LNq32Pseudo_UPD
8344 { 2511, 9, 2, 4, 632, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2511 = VLD3LNd16Pseudo_UPD
8348 { 2515, 9, 2, 4, 997, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2515 = VLD3LNd32Pseudo_UPD
8352 { 2519, 9, 2, 4, 632, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2519 = VLD3LNd8Pseudo_UPD
8415 { 2582, 9, 2, 4, 639, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2582 = VLD4LNd16Pseudo_UPD
8419 { 2586, 9, 2, 4, 1000, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2586 = VLD4LNd32Pseudo_UPD
8423 { 2590, 9, 2, 4, 639, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #2590 = VLD4LNd8Pseudo_UPD