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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 8275 { 2442, 7, 1, 4, 623, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2442 = VLD2LNq16Pseudo
8279 { 2446, 7, 1, 4, 623, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2446 = VLD2LNq32Pseudo
8343 { 2510, 7, 1, 4, 628, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2510 = VLD3LNd16Pseudo
8347 { 2514, 7, 1, 4, 995, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2514 = VLD3LNd32Pseudo
8351 { 2518, 7, 1, 4, 628, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2518 = VLD3LNd8Pseudo
8414 { 2581, 7, 1, 4, 634, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2581 = VLD4LNd16Pseudo
8418 { 2585, 7, 1, 4, 998, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2585 = VLD4LNd32Pseudo
8422 { 2589, 7, 1, 4, 634, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #2589 = VLD4LNd8Pseudo