reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenInstrInfo.inc
 8187   { 2354,	6,	2,	4,	601,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #2354 = VLD1d64QPseudoWB_fixed
 8193   { 2360,	6,	2,	4,	599,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #2360 = VLD1d64TPseudoWB_fixed
 8302   { 2469,	6,	2,	4,	606,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #2469 = VLD2q16PseudoWB_fixed
 8308   { 2475,	6,	2,	4,	606,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #2475 = VLD2q32PseudoWB_fixed
 8314   { 2481,	6,	2,	4,	606,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x10006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #2481 = VLD2q8PseudoWB_fixed