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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 7726 { 1893, 5, 1, 4, 520, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1893 = VABDLsv2i64
7727 { 1894, 5, 1, 4, 751, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1894 = VABDLsv4i32
7728 { 1895, 5, 1, 4, 751, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1895 = VABDLsv8i16
7729 { 1896, 5, 1, 4, 520, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1896 = VABDLuv2i64
7730 { 1897, 5, 1, 4, 751, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1897 = VABDLuv4i32
7731 { 1898, 5, 1, 4, 751, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1898 = VABDLuv8i16
7774 { 1941, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1941 = VADDLsv2i64
7775 { 1942, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1942 = VADDLsv4i32
7776 { 1943, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1943 = VADDLsv8i16
7777 { 1944, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1944 = VADDLuv2i64
7778 { 1945, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1945 = VADDLuv4i32
7779 { 1946, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #1946 = VADDLuv8i16
8640 { 2807, 5, 1, 4, 976, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2807 = VMULLp8
8645 { 2812, 5, 1, 4, 533, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2812 = VMULLsv2i64
8646 { 2813, 5, 1, 4, 976, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2813 = VMULLsv4i32
8647 { 2814, 5, 1, 4, 976, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2814 = VMULLsv8i16
8648 { 2815, 5, 1, 4, 533, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2815 = VMULLuv2i64
8649 { 2816, 5, 1, 4, 976, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2816 = VMULLuv4i32
8650 { 2817, 5, 1, 4, 976, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2817 = VMULLuv8i16
8793 { 2960, 5, 1, 4, 789, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2960 = VQDMULLv2i64
8794 { 2961, 5, 1, 4, 790, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #2961 = VQDMULLv4i32
9458 { 3625, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3625 = VSUBLsv2i64
9459 { 3626, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3626 = VSUBLsv4i32
9460 { 3627, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3627 = VSUBLsv8i16
9461 { 3628, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3628 = VSUBLuv2i64
9462 { 3629, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3629 = VSUBLuv4i32
9463 { 3630, 5, 1, 4, 755, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3630 = VSUBLuv8i16