reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenInstrInfo.inc
 7715   { 1882,	6,	1,	4,	748,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1882 = VABAsv2i32
 7716   { 1883,	6,	1,	4,	748,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1883 = VABAsv4i16
 7719   { 1886,	6,	1,	4,	748,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1886 = VABAsv8i8
 7721   { 1888,	6,	1,	4,	748,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1888 = VABAuv2i32
 7722   { 1889,	6,	1,	4,	748,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1889 = VABAuv4i16
 7725   { 1892,	6,	1,	4,	748,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1892 = VABAuv8i8
 7807   { 1974,	6,	1,	4,	760,	0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1974 = VBIFd
 7809   { 1976,	6,	1,	4,	760,	0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1976 = VBITd
 7811   { 1978,	6,	1,	4,	761,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #1978 = VBSLd
 8067   { 2234,	6,	1,	4,	545,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2234 = VFMAD
 8074   { 2241,	6,	1,	4,	548,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2241 = VFMAfd
 8076   { 2243,	6,	1,	4,	771,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2243 = VFMAhd
 8078   { 2245,	6,	1,	4,	545,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2245 = VFMSD
 8085   { 2252,	6,	1,	4,	548,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2252 = VFMSfd
 8087   { 2254,	6,	1,	4,	771,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2254 = VFMShd
 8089   { 2256,	6,	1,	4,	545,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2256 = VFNMAD
 8092   { 2259,	6,	1,	4,	545,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2259 = VFNMSD
 8522   { 2689,	6,	1,	4,	536,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2689 = VMLAD
 8535   { 2702,	6,	1,	4,	541,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2702 = VMLAfd
 8537   { 2704,	6,	1,	4,	541,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2704 = VMLAhd
 8548   { 2715,	6,	1,	4,	970,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2715 = VMLAv2i32
 8549   { 2716,	6,	1,	4,	971,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2716 = VMLAv4i16
 8552   { 2719,	6,	1,	4,	971,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2719 = VMLAv8i8
 8553   { 2720,	6,	1,	4,	536,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2720 = VMLSD
 8566   { 2733,	6,	1,	4,	541,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2733 = VMLSfd
 8568   { 2735,	6,	1,	4,	541,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2735 = VMLShd
 8579   { 2746,	6,	1,	4,	970,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2746 = VMLSv2i32
 8580   { 2747,	6,	1,	4,	971,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2747 = VMLSv4i16
 8583   { 2750,	6,	1,	4,	971,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2750 = VMLSv8i8
 8691   { 2858,	6,	1,	4,	536,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2858 = VNMLAD
 8694   { 2861,	6,	1,	4,	536,	0|(1ULL<<MCID::Predicable), 0x8800ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2861 = VNMLSD
 8814   { 2981,	6,	1,	4,	972,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2981 = VQRDMLAHv2i32
 8815   { 2982,	6,	1,	4,	973,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2982 = VQRDMLAHv4i16
 8822   { 2989,	6,	1,	4,	972,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2989 = VQRDMLSHv2i32
 8823   { 2990,	6,	1,	4,	973,	0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #2990 = VQRDMLSHv4i16
 9491   { 3658,	6,	1,	4,	502,	0|(1ULL<<MCID::Predicable), 0x11480ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3658 = VTBX1
 9493   { 3660,	6,	1,	4,	506,	0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x11480ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3660 = VTBX3
 9495   { 3662,	6,	1,	4,	508,	0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x11480ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3662 = VTBX4