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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 7714 { 1881, 6, 1, 4, 477, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1881 = VABAsv16i8
7717 { 1884, 6, 1, 4, 477, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1884 = VABAsv4i32
7718 { 1885, 6, 1, 4, 477, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1885 = VABAsv8i16
7720 { 1887, 6, 1, 4, 477, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1887 = VABAuv16i8
7723 { 1890, 6, 1, 4, 477, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1890 = VABAuv4i32
7724 { 1891, 6, 1, 4, 477, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1891 = VABAuv8i16
7808 { 1975, 6, 1, 4, 762, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1975 = VBIFq
7810 { 1977, 6, 1, 4, 762, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1977 = VBITq
7812 { 1979, 6, 1, 4, 763, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #1979 = VBSLq
8075 { 2242, 6, 1, 4, 549, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2242 = VFMAfq
8077 { 2244, 6, 1, 4, 772, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2244 = VFMAhq
8086 { 2253, 6, 1, 4, 549, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2253 = VFMSfq
8088 { 2255, 6, 1, 4, 772, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2255 = VFMShq
8536 { 2703, 6, 1, 4, 542, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2703 = VMLAfq
8538 { 2705, 6, 1, 4, 542, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2705 = VMLAhq
8547 { 2714, 6, 1, 4, 544, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2714 = VMLAv16i8
8550 { 2717, 6, 1, 4, 543, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2717 = VMLAv4i32
8551 { 2718, 6, 1, 4, 544, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2718 = VMLAv8i16
8567 { 2734, 6, 1, 4, 542, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2734 = VMLSfq
8569 { 2736, 6, 1, 4, 542, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2736 = VMLShq
8578 { 2745, 6, 1, 4, 544, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2745 = VMLSv16i8
8581 { 2748, 6, 1, 4, 543, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2748 = VMLSv4i32
8582 { 2749, 6, 1, 4, 544, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2749 = VMLSv8i16
8816 { 2983, 6, 1, 4, 974, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2983 = VQRDMLAHv4i32
8817 { 2984, 6, 1, 4, 975, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2984 = VQRDMLAHv8i16
8824 { 2991, 6, 1, 4, 974, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2991 = VQRDMLSHv4i32
8825 { 2992, 6, 1, 4, 975, 0|(1ULL<<MCID::Predicable), 0x11280ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #2992 = VQRDMLSHv8i16