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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 7206 { 1373, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1373 = MVE_VQRSHRNbhs16
7207 { 1374, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1374 = MVE_VQRSHRNbhs32
7208 { 1375, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1375 = MVE_VQRSHRNbhu16
7209 { 1376, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1376 = MVE_VQRSHRNbhu32
7210 { 1377, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1377 = MVE_VQRSHRNths16
7211 { 1378, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1378 = MVE_VQRSHRNths32
7212 { 1379, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1379 = MVE_VQRSHRNthu16
7213 { 1380, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1380 = MVE_VQRSHRNthu32
7214 { 1381, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1381 = MVE_VQRSHRUNs16bh
7215 { 1382, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1382 = MVE_VQRSHRUNs16th
7216 { 1383, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1383 = MVE_VQRSHRUNs32bh
7217 { 1384, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1384 = MVE_VQRSHRUNs32th
7233 { 1400, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1400 = MVE_VQSHRNbhs16
7234 { 1401, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1401 = MVE_VQSHRNbhs32
7235 { 1402, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1402 = MVE_VQSHRNbhu16
7236 { 1403, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1403 = MVE_VQSHRNbhu32
7237 { 1404, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1404 = MVE_VQSHRNths16
7238 { 1405, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1405 = MVE_VQSHRNths32
7239 { 1406, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1406 = MVE_VQSHRNthu16
7240 { 1407, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1407 = MVE_VQSHRNthu32
7241 { 1408, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1408 = MVE_VQSHRUNs16bh
7242 { 1409, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1409 = MVE_VQSHRUNs16th
7243 { 1410, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1410 = MVE_VQSHRUNs32bh
7244 { 1411, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1411 = MVE_VQSHRUNs32th
7309 { 1476, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1476 = MVE_VRSHRNi16bh
7310 { 1477, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1477 = MVE_VRSHRNi16th
7311 { 1478, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1478 = MVE_VRSHRNi32bh
7312 { 1479, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1479 = MVE_VRSHRNi32th
7353 { 1520, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1520 = MVE_VSHRNi16bh
7354 { 1521, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1521 = MVE_VSHRNi16th
7355 { 1522, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1522 = MVE_VSHRNi32bh
7356 { 1523, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1523 = MVE_VSHRNi32th
7363 { 1530, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1530 = MVE_VSLIimm16
7364 { 1531, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1531 = MVE_VSLIimm32
7365 { 1532, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1532 = MVE_VSLIimm8
7372 { 1539, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1539 = MVE_VSRIimm16
7373 { 1540, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1540 = MVE_VSRIimm32
7374 { 1541, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1541 = MVE_VSRIimm8