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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 6851 { 1018, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1018 = MVE_VLDRBS16_rq
6855 { 1022, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1022 = MVE_VLDRBS32_rq
6859 { 1026, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1026 = MVE_VLDRBU16_rq
6863 { 1030, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1030 = MVE_VLDRBU32_rq
6867 { 1034, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1034 = MVE_VLDRBU8_rq
6870 { 1037, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1037 = MVE_VLDRDU64_rq
6871 { 1038, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1038 = MVE_VLDRDU64_rq_u
6875 { 1042, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1042 = MVE_VLDRHS32_rq
6876 { 1043, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1043 = MVE_VLDRHS32_rq_u
6880 { 1047, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1047 = MVE_VLDRHU16_rq
6881 { 1048, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1048 = MVE_VLDRHU16_rq_u
6885 { 1052, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1052 = MVE_VLDRHU32_rq
6886 { 1053, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1053 = MVE_VLDRHU32_rq_u
6892 { 1059, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1059 = MVE_VLDRWU32_rq
6893 { 1060, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1060 = MVE_VLDRWU32_rq_u