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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 6849 { 1016, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cd5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1016 = MVE_VLDRBS16_post
6850 { 1017, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cb5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1017 = MVE_VLDRBS16_pre
6853 { 1020, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cd5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1020 = MVE_VLDRBS32_post
6854 { 1021, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cb5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1021 = MVE_VLDRBS32_pre
6857 { 1024, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cd5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1024 = MVE_VLDRBU16_post
6858 { 1025, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cb5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1025 = MVE_VLDRBU16_pre
6861 { 1028, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cd5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1028 = MVE_VLDRBU32_post
6862 { 1029, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cb5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1029 = MVE_VLDRBU32_pre
6873 { 1040, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cd4ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1040 = MVE_VLDRHS32_post
6874 { 1041, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cb4ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1041 = MVE_VLDRHS32_pre
6883 { 1050, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cd4ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1050 = MVE_VLDRHU32_post
6884 { 1051, 6, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x140cb4ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1051 = MVE_VLDRHU32_pre
7412 { 1579, 6, 1, 4, 0, 0|(1ULL<<MCID::MayStore), 0x140cd5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1579 = MVE_VSTRB16_post
7413 { 1580, 6, 1, 4, 0, 0|(1ULL<<MCID::MayStore), 0x140cb5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1580 = MVE_VSTRB16_pre
7416 { 1583, 6, 1, 4, 0, 0|(1ULL<<MCID::MayStore), 0x140cd5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1583 = MVE_VSTRB32_post
7417 { 1584, 6, 1, 4, 0, 0|(1ULL<<MCID::MayStore), 0x140cb5ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1584 = MVE_VSTRB32_pre
7430 { 1597, 6, 1, 4, 0, 0|(1ULL<<MCID::MayStore), 0x140cd4ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1597 = MVE_VSTRH32_post
7431 { 1598, 6, 1, 4, 0, 0|(1ULL<<MCID::MayStore), 0x140cb4ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1598 = MVE_VSTRH32_pre