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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 6727 { 894, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #894 = MVE_VCVTf16s16_fix
6729 { 896, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #896 = MVE_VCVTf16u16_fix
6733 { 900, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #900 = MVE_VCVTf32s32_fix
6735 { 902, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #902 = MVE_VCVTf32u32_fix
6737 { 904, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #904 = MVE_VCVTs16f16_fix
6743 { 910, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #910 = MVE_VCVTs32f32_fix
6749 { 916, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #916 = MVE_VCVTu16f16_fix
6755 { 922, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #922 = MVE_VCVTu32f32_fix
7218 { 1385, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1385 = MVE_VQSHLU_imms16
7219 { 1386, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1386 = MVE_VQSHLU_imms32
7220 { 1387, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1387 = MVE_VQSHLU_imms8
7313 { 1480, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1480 = MVE_VRSHR_imms16
7314 { 1481, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1481 = MVE_VRSHR_imms32
7315 { 1482, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1482 = MVE_VRSHR_imms8
7316 { 1483, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1483 = MVE_VRSHR_immu16
7317 { 1484, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1484 = MVE_VRSHR_immu32
7318 { 1485, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1485 = MVE_VRSHR_immu8
7322 { 1489, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1489 = MVE_VSHLL_imms16bh
7323 { 1490, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1490 = MVE_VSHLL_imms16th
7324 { 1491, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1491 = MVE_VSHLL_imms8bh
7325 { 1492, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1492 = MVE_VSHLL_imms8th
7326 { 1493, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1493 = MVE_VSHLL_immu16bh
7327 { 1494, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1494 = MVE_VSHLL_immu16th
7328 { 1495, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1495 = MVE_VSHLL_immu8bh
7329 { 1496, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1496 = MVE_VSHLL_immu8th
7344 { 1511, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1511 = MVE_VSHL_immi16
7345 { 1512, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1512 = MVE_VSHL_immi32
7346 { 1513, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1513 = MVE_VSHL_immi8
7357 { 1524, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1524 = MVE_VSHR_imms16
7358 { 1525, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1525 = MVE_VSHR_imms32
7359 { 1526, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1526 = MVE_VSHR_imms8
7360 { 1527, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1527 = MVE_VSHR_immu16
7361 { 1528, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1528 = MVE_VSHR_immu32
7362 { 1529, 6, 1, 4, 0, 0, 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1529 = MVE_VSHR_immu8
7366 { 1533, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1533 = MVE_VSLIimms16
7367 { 1534, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1534 = MVE_VSLIimms32
7368 { 1535, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1535 = MVE_VSLIimms8
7369 { 1536, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1536 = MVE_VSLIimmu16
7370 { 1537, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1537 = MVE_VSLIimmu32
7371 { 1538, 6, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1538 = MVE_VSLIimmu8