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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 5833 { 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #0 = PHI
5843 { 10, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #10 = IMPLICIT_DEF
5847 { 14, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #14 = DBG_LABEL
5859 { 26, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #26 = FAULTING_OP
5920 { 87, 1, 0, 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #87 = G_INTRINSIC
5921 { 88, 1, 0, 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #88 = G_INTRINSIC_W_SIDE_EFFECTS
5984 { 151, 1, 0, 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #151 = G_BR
6352 { 519, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #519 = t2BF_LabelPseudo
6454 { 621, 1, 0, 4, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #621 = BKPT
6477 { 644, 1, 0, 4, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #644 = CPS1p
6487 { 654, 1, 0, 4, 841, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #654 = DMB
6488 { 655, 1, 0, 4, 841, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #655 = DSB
6505 { 672, 1, 0, 4, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #672 = HLT
6506 { 673, 1, 0, 4, 841, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #673 = HVC
6507 { 674, 1, 0, 4, 841, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #674 = ISB
7085 { 1252, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x140c80ULL, ImplicitList12, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1252 = MVE_VPST
7523 { 1690, 1, 0, 4, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, ARM::HasV8Ops ,nullptr }, // Inst #1690 = SETEND
7524 { 1691, 1, 0, 4, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1691 = SETPAN
7578 { 1745, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1745 = SRSDA
7579 { 1746, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1746 = SRSDA_UPD
7580 { 1747, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1747 = SRSDB
7581 { 1748, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1748 = SRSDB_UPD
7582 { 1749, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1749 = SRSIA
7583 { 1750, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1750 = SRSIA_UPD
7584 { 1751, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1751 = SRSIB
7585 { 1752, 1, 0, 4, 726, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1752 = SRSIB_UPD
7669 { 1836, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1836 = TSB
7678 { 1845, 1, 0, 4, 841, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1845 = UDF
9609 { 3776, 1, 0, 4, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #3776 = t2CPS1p
9633 { 3800, 1, 0, 4, 842, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #3800 = t2HVC
9793 { 3960, 1, 0, 2, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #3960 = t2SETPAN
9927 { 4094, 1, 0, 4, 1026, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #4094 = t2UDF
9973 { 4140, 1, 0, 2, 1027, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #4140 = tBKPT
9990 { 4157, 1, 0, 2, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #4157 = tHLT
10024 { 4191, 1, 0, 2, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, ARM::HasV8Ops ,nullptr }, // Inst #4191 = tSETEND
10042 { 4209, 1, 0, 2, 1026, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #4209 = tUDF