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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 6523 { 690, 6, 0, 4, 844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #690 = LDCL_OFFSET
6525 { 692, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x140ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #692 = LDCL_POST
6526 { 693, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x120ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #693 = LDCL_PRE
6527 { 694, 6, 0, 4, 844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #694 = LDC_OFFSET
6529 { 696, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x140ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #696 = LDC_POST
6530 { 697, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x120ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #697 = LDC_PRE
7599 { 1766, 6, 0, 4, 844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1766 = STCL_OFFSET
7601 { 1768, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x140ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1768 = STCL_POST
7602 { 1769, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x120ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1769 = STCL_PRE
7603 { 1770, 6, 0, 4, 844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1770 = STC_OFFSET
7605 { 1772, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x140ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1772 = STC_POST
7606 { 1773, 6, 0, 4, 844, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x120ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1773 = STC_PRE
9645 { 3812, 6, 0, 4, 845, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3812 = t2LDC2L_OFFSET
9647 { 3814, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3814 = t2LDC2L_POST
9648 { 3815, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3815 = t2LDC2L_PRE
9649 { 3816, 6, 0, 4, 845, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3816 = t2LDC2_OFFSET
9651 { 3818, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3818 = t2LDC2_POST
9652 { 3819, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3819 = t2LDC2_PRE
9653 { 3820, 6, 0, 4, 845, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3820 = t2LDCL_OFFSET
9655 { 3822, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3822 = t2LDCL_POST
9656 { 3823, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3823 = t2LDCL_PRE
9657 { 3824, 6, 0, 4, 845, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3824 = t2LDC_OFFSET
9659 { 3826, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3826 = t2LDC_POST
9660 { 3827, 6, 0, 4, 845, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #3827 = t2LDC_PRE
9847 { 4014, 6, 0, 4, 1024, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4014 = t2STC2L_OFFSET
9849 { 4016, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4016 = t2STC2L_POST
9850 { 4017, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4017 = t2STC2L_PRE
9851 { 4018, 6, 0, 4, 1024, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4018 = t2STC2_OFFSET
9853 { 4020, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4020 = t2STC2_POST
9854 { 4021, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4021 = t2STC2_PRE
9855 { 4022, 6, 0, 4, 1024, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4022 = t2STCL_OFFSET
9857 { 4024, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4024 = t2STCL_POST
9858 { 4025, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4025 = t2STCL_PRE
9859 { 4026, 6, 0, 4, 1024, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4026 = t2STC_OFFSET
9861 { 4028, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4028 = t2STC_POST
9862 { 4029, 6, 0, 4, 1024, 0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #4029 = t2STC_PRE