reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
6408 { 575, 3, 0, 4, 853, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo118, -1 ,nullptr }, // Inst #575 = tBfar 6425 { 592, 3, 0, 4, 851, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #592 = tTAILJMPd 6426 { 593, 3, 0, 4, 851, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #593 = tTAILJMPdND 6459 { 626, 3, 0, 4, 854, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x100ULL, ImplicitList2, ImplicitList3, OperandInfo118, -1 ,nullptr }, // Inst #626 = BL_pred 6464 { 631, 3, 0, 4, 851, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #631 = Bcc 9585 { 3752, 3, 0, 4, 851, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0xc80ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #3752 = t2B 9597 { 3764, 3, 0, 4, 851, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #3764 = t2Bcc 9971 { 4138, 3, 0, 2, 851, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0xc80ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #4138 = tB 9980 { 4147, 3, 0, 2, 851, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #4147 = tBcc