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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenInstrInfo.inc 6384 { 551, 5, 1, 4, 690, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::HasPostISelHook), 0x0ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr }, // Inst #551 = t2RSBSri
9907 { 4074, 5, 1, 4, 895, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #4074 = t2SXTB
9908 { 4075, 5, 1, 4, 352, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #4075 = t2SXTB16
9909 { 4076, 5, 1, 4, 895, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #4076 = t2SXTH
9954 { 4121, 5, 1, 4, 895, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #4121 = t2UXTB
9955 { 4122, 5, 1, 4, 352, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #4122 = t2UXTB16
9956 { 4123, 5, 1, 4, 895, 0|(1ULL<<MCID::Predicable), 0xc80ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #4123 = t2UXTH