reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
10794   { 687 /* mov */, ARM::MOVsi, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc
21738 /* 46700*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsi), 0,
32886 /* 72385*/      OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsi), 0,
32994 /* 72625*/      OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsi), 0,
35382 /* 78018*/        OPC_MorphNodeTo1, TARGET_VAL(ARM::MOVsi), 0,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc
14371     case ARM::MOVsi: {
lib/Target/ARM/ARMExpandPseudoInsts.cpp
 1244       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
 1384       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
 1397           BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
lib/Target/ARM/ARMFastISel.cpp
 2636         /*  1 bit sext */ { { ARM::MOVsi  , 1, ARM_AM::asr     ,  31 },
 2637         /*  1 bit zext */   { ARM::MOVsi  , 1, ARM_AM::lsr     ,  31 } },
 2638         /*  8 bit sext */ { { ARM::MOVsi  , 1, ARM_AM::asr     ,  24 },
 2639         /*  8 bit zext */   { ARM::MOVsi  , 1, ARM_AM::lsr     ,  24 } },
 2640         /* 16 bit sext */ { { ARM::MOVsi  , 1, ARM_AM::asr     ,  16 },
 2641         /* 16 bit zext */   { ARM::MOVsi  , 1, ARM_AM::lsr     ,  16 } }
 2692   assert(((Shift == ARM_AM::no_shift) == (Opc != ARM::MOVsi)) &&
 2698   unsigned LSLOpc = isThumb2 ? ARM::tLSLri : ARM::MOVsi;
 2786     Opc = ARM::MOVsi;
 2806   if (Opc == ARM::MOVsi)
lib/Target/ARM/ARMFrameLowering.cpp
  318       BuildMI(MBB, MBBI, DL, TII.get(ARM::MOVsi), Reg)
  323       BuildMI(MBB, MBBI, DL, TII.get(ARM::MOVsi), Reg)
lib/Target/ARM/ARMISelDAGToDAG.cpp
 2685           CurDAG->SelectNodeTo(N, ARM::MOVsi, MVT::i32, Ops);
lib/Target/ARM/ARMISelLowering.cpp
 9770     BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3)
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 9656     unsigned Opc = Amt == 0 ? ARM::MOVr : ARM::MOVsi;
 9665     if (Opc == ARM::MOVsi)
 9676     TmpInst.setOpcode(ARM::MOVsi);
10014   case ARM::MOVsi: {
lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
  120   case ARM::MOVsi: {