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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc 6211 return MCK__DOT_u8; // ".u8"
6380 case MCK__DOT_u8:
9370 case MCK__DOT_u8: return "MCK__DOT_u8";
11559 { 1960 /* vaba */, ARM::VABAuv16i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
11560 { 1960 /* vaba */, ARM::VABAuv8i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
11566 { 1965 /* vabal */, ARM::VABALuv8i16, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
11572 { 1971 /* vabav */, ARM::MVE_VABAVu8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_rGPR, MCK_MQPR, MCK_MQPR }, },
11583 { 1977 /* vabd */, ARM::VABDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
11584 { 1977 /* vabd */, ARM::VABDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
11599 { 1977 /* vabd */, ARM::VABDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
11600 { 1977 /* vabd */, ARM::VABDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
11610 { 1977 /* vabd */, ARM::MVE_VABDu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
11618 { 1982 /* vabdl */, ARM::VABDLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
11719 { 2040 /* vaddl */, ARM::VADDLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
11729 { 2061 /* vaddv */, ARM::MVE_VADDVu8no_acc, Convert__Reg1_2__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_tGPREven, MCK_MQPR }, },
11735 { 2067 /* vaddva */, ARM::MVE_VADDVu8acc, Convert__Reg1_2__Tie0_1_1__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_tGPREven, MCK_MQPR }, },
11741 { 2074 /* vaddw */, ARM::VADDWuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR }, },
11747 { 2074 /* vaddw */, ARM::VADDWuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_DPR }, },
11784 { 2080 /* vand */, ARM::MVE_VAND, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
11818 { 2085 /* vbic */, ARM::MVE_VBIC, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
11922 { 2122 /* vcge */, ARM::VCGEuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
11923 { 2122 /* vcge */, ARM::VCGEuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
11948 { 2122 /* vcge */, ARM::VCGEuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
11949 { 2122 /* vcge */, ARM::VCGEuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
11974 { 2127 /* vcgt */, ARM::VCGTuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
11975 { 2127 /* vcgt */, ARM::VCGTuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
12000 { 2127 /* vcgt */, ARM::VCGTuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
12001 { 2127 /* vcgt */, ARM::VCGTuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
12036 { 2132 /* vcle */, ARM::VCGEuv16i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
12037 { 2132 /* vcle */, ARM::VCGEuv8i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
12081 { 2142 /* vclt */, ARM::VCGTuv16i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
12082 { 2142 /* vclt */, ARM::VCGTuv8i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
12126 { 2158 /* vcmp */, ARM::MVE_VCMPu8, Convert__imm_95_0__Reg1_3__Reg1_4__CondCodeRestrictedU1_2__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_CondCodeRestrictedU, MCK_MQPR, MCK_MQPR }, },
12127 { 2158 /* vcmp */, ARM::MVE_VCMPu8r, Convert__imm_95_0__Reg1_3__Reg1_4__CondCodeRestrictedU1_2__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_CondCodeRestrictedU, MCK_MQPR, MCK_GPRwithZR }, },
12348 { 2232 /* vddup */, ARM::MVE_VDDUPu8, Convert__Reg1_2__Reg1_3__Tie1_1_1__VIDUP_imm1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_tGPREven, MCK_VIDUP_imm }, },
12372 { 2248 /* vdwdup */, ARM::MVE_VDWDUPu8, Convert__Reg1_2__Reg1_3__Tie1_1_1__Reg1_4__VIDUP_imm1_5__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_tGPREven, MCK_tGPROdd, MCK_VIDUP_imm }, },
12399 { 2255 /* veor */, ARM::MVE_VEOR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12465 { 2305 /* vhadd */, ARM::VHADDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
12466 { 2305 /* vhadd */, ARM::VHADDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
12477 { 2305 /* vhadd */, ARM::VHADDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
12478 { 2305 /* vhadd */, ARM::VHADDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
12489 { 2305 /* vhadd */, ARM::MVE_VHADDu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12490 { 2305 /* vhadd */, ARM::MVE_VHADD_qr_u8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_rGPR }, },
12504 { 2318 /* vhsub */, ARM::VHSUBuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
12505 { 2318 /* vhsub */, ARM::VHSUBuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
12516 { 2318 /* vhsub */, ARM::VHSUBuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
12517 { 2318 /* vhsub */, ARM::VHSUBuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
12528 { 2318 /* vhsub */, ARM::MVE_VHSUBu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
12529 { 2318 /* vhsub */, ARM::MVE_VHSUB_qr_u8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_rGPR }, },
12532 { 2324 /* vidup */, ARM::MVE_VIDUPu8, Convert__Reg1_2__Reg1_3__Tie1_1_1__VIDUP_imm1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_tGPREven, MCK_VIDUP_imm }, },
12536 { 2335 /* viwdup */, ARM::MVE_VIWDUPu8, Convert__Reg1_2__Reg1_3__Tie1_1_1__Reg1_4__VIDUP_imm1_5__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_tGPREven, MCK_tGPROdd, MCK_VIDUP_imm }, },
12902 { 2423 /* vldrb */, ARM::MVE_VLDRBU8, Convert__Reg1_2__MemImm7Shift0Offset2_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MemImm7Shift0Offset }, },
12903 { 2423 /* vldrb */, ARM::MVE_VLDRBU8_rq, Convert__Reg1_2__MemRegRQS0Offset2_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MemRegRQS0Offset }, },
12912 { 2423 /* vldrb */, ARM::MVE_VLDRBU8_pre, Convert__imm_95_0__Reg1_2__MemImm7Shift0OffsetWB2_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MemImm7Shift0OffsetWB, MCK__EXCLAIM_ }, },
12913 { 2423 /* vldrb */, ARM::MVE_VLDRBU8_post, Convert__MemNoOffsetT21_3__Reg1_2__Tie0_4_4__Imm7Shift01_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MemNoOffsetT2, MCK_Imm7Shift0 }, },
12952 { 2459 /* vmax */, ARM::VMAXuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
12953 { 2459 /* vmax */, ARM::VMAXuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
12968 { 2459 /* vmax */, ARM::VMAXuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
12969 { 2459 /* vmax */, ARM::VMAXuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
12979 { 2459 /* vmax */, ARM::MVE_VMAXu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13006 { 2509 /* vmaxv */, ARM::MVE_VMAXVu8, Convert__Reg1_2__Tie0_3_3__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_rGPR, MCK_MQPR }, },
13017 { 2515 /* vmin */, ARM::VMINuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
13018 { 2515 /* vmin */, ARM::VMINuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13033 { 2515 /* vmin */, ARM::VMINuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
13034 { 2515 /* vmin */, ARM::VMINuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
13044 { 2515 /* vmin */, ARM::MVE_VMINu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13071 { 2565 /* vminv */, ARM::MVE_VMINVu8, Convert__Reg1_2__Tie0_3_3__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_rGPR, MCK_MQPR }, },
13090 { 2571 /* vmla */, ARM::MVE_VMLA_qr_u8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_rGPR }, },
13104 { 2576 /* vmladav */, ARM::MVE_VMLADAVu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_tGPREven, MCK_MQPR, MCK_MQPR }, },
13110 { 2584 /* vmladava */, ARM::MVE_VMLADAVau8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_tGPREven, MCK_MQPR, MCK_MQPR }, },
13122 { 2612 /* vmlal */, ARM::VMLALuv8i16, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
13152 { 2673 /* vmlas */, ARM::MVE_VMLAS_qr_u8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_rGPR }, },
13158 { 2679 /* vmlav */, ARM::MVE_VMLADAVu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredN, MCK__DOT_u8, MCK_tGPREven, MCK_MQPR, MCK_MQPR }, },
13164 { 2685 /* vmlava */, ARM::MVE_VMLADAVau8, Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredN, MCK__DOT_u8, MCK_tGPREven, MCK_MQPR, MCK_MQPR }, },
13203 { 2733 /* vmlsl */, ARM::VMLSLuv8i16, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
13282 { 2779 /* vmov */, ARM::MVE_VMOV_from_lane_u8, Convert__Reg1_2__Reg1_3__MVEVectorIndex161_4__CondCode2_0, AMFBS_HasV8_1MMainline_HasMVEInt, { MCK_CondCode, MCK__DOT_u8, MCK_rGPR, MCK_MQPR, MCK_MVEVectorIndex16 }, },
13283 { 2779 /* vmov */, ARM::VGETLNu8, Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_GPR, MCK_DPR, MCK_VectorIndex8 }, },
13303 { 2784 /* vmovl */, ARM::VMOVLuv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR }, },
13307 { 2790 /* vmovlb */, ARM::MVE_VMOVLu8bh, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR }, },
13311 { 2797 /* vmovlt */, ARM::MVE_VMOVLu8th, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR }, },
13405 { 2845 /* vmulh */, ARM::MVE_VMULHu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13412 { 2851 /* vmull */, ARM::VMULLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
13423 { 2857 /* vmullb */, ARM::MVE_VMULLu8bh, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13431 { 2864 /* vmullt */, ARM::MVE_VMULLu8th, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13506 { 2899 /* vorn */, ARM::MVE_VORN, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13548 { 2904 /* vorr */, ARM::MVE_VORR, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13564 { 2909 /* vpadal */, ARM::VPADALuv16i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
13565 { 2909 /* vpadal */, ARM::VPADALuv8i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13586 { 2922 /* vpaddl */, ARM::VPADDLuv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
13587 { 2922 /* vpaddl */, ARM::VPADDLuv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13593 { 2929 /* vpmax */, ARM::VPMAXu8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13601 { 2929 /* vpmax */, ARM::VPMAXu8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
13609 { 2935 /* vpmin */, ARM::VPMINu8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13617 { 2935 /* vpmin */, ARM::VPMINu8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
13637 { 2952 /* vpsel */, ARM::MVE_VPSEL, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredN2_0, AMFBS_HasMVEInt_IsThumb, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13654 { 2963 /* vpt */, ARM::MVE_VPTv16u8, Convert__ITMask1_0__Reg1_3__Reg1_4__CondCodeRestrictedU1_2, AMFBS_HasMVEInt, { MCK_ITMask, MCK__DOT_u8, MCK_CondCodeRestrictedU, MCK_MQPR, MCK_MQPR }, },
13655 { 2963 /* vpt */, ARM::MVE_VPTv16u8r, Convert__ITMask1_0__Reg1_3__Reg1_4__CondCodeRestrictedU1_2, AMFBS_HasMVEInt, { MCK_ITMask, MCK__DOT_u8, MCK_CondCodeRestrictedU, MCK_MQPR, MCK_GPRwithZR }, },
13699 { 2979 /* vqadd */, ARM::VQADDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
13700 { 2979 /* vqadd */, ARM::VQADDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13715 { 2979 /* vqadd */, ARM::VQADDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
13716 { 2979 /* vqadd */, ARM::VQADDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
13727 { 2979 /* vqadd */, ARM::MVE_VQADDu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13728 { 2979 /* vqadd */, ARM::MVE_VQADD_qr_u8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_rGPR }, },
13881 { 3224 /* vqrshl */, ARM::VQRSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
13882 { 3224 /* vqrshl */, ARM::VQRSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13888 { 3224 /* vqrshl */, ARM::MVE_VQRSHL_qru8, Convert__Reg1_2__Tie0_1_1__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_rGPR }, },
13903 { 3224 /* vqrshl */, ARM::VQRSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
13904 { 3224 /* vqrshl */, ARM::VQRSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
13910 { 3224 /* vqrshl */, ARM::MVE_VQRSHL_by_vecu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
13960 { 3286 /* vqshl */, ARM::VQSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
13961 { 3286 /* vqshl */, ARM::VQSHLuiv16i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_Imm }, },
13962 { 3286 /* vqshl */, ARM::VQSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
13963 { 3286 /* vqshl */, ARM::VQSHLuiv8i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_Imm }, },
13969 { 3286 /* vqshl */, ARM::MVE_VQSHL_qru8, Convert__Reg1_2__Tie0_1_1__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_rGPR }, },
13998 { 3286 /* vqshl */, ARM::VQSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
13999 { 3286 /* vqshl */, ARM::VQSHLuiv16i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_Imm }, },
14000 { 3286 /* vqshl */, ARM::VQSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
14001 { 3286 /* vqshl */, ARM::VQSHLuiv8i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_Imm }, },
14012 { 3286 /* vqshl */, ARM::MVE_VQSHL_by_vecu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
14013 { 3286 /* vqshl */, ARM::MVE_VSLIimmu8, Convert__Reg1_2__Reg1_3__Imm0_71_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_Imm0_7 }, },
14068 { 3348 /* vqsub */, ARM::VQSUBuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
14069 { 3348 /* vqsub */, ARM::VQSUBuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
14084 { 3348 /* vqsub */, ARM::VQSUBuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
14085 { 3348 /* vqsub */, ARM::VQSUBuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
14096 { 3348 /* vqsub */, ARM::MVE_VQSUBu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
14097 { 3348 /* vqsub */, ARM::MVE_VQSUB_qr_u8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_rGPR }, },
14143 { 3397 /* vrhadd */, ARM::VRHADDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
14144 { 3397 /* vrhadd */, ARM::VRHADDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
14155 { 3397 /* vrhadd */, ARM::VRHADDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
14156 { 3397 /* vrhadd */, ARM::VRHADDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
14162 { 3397 /* vrhadd */, ARM::MVE_VRHADDu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
14280 { 3568 /* vrmulh */, ARM::MVE_VRMULHu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
14295 { 3575 /* vrshl */, ARM::VRSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
14296 { 3575 /* vrshl */, ARM::VRSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
14302 { 3575 /* vrshl */, ARM::MVE_VRSHL_qru8, Convert__Reg1_2__Tie0_1_1__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_rGPR }, },
14317 { 3575 /* vrshl */, ARM::VRSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
14318 { 3575 /* vrshl */, ARM::VRSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
14324 { 3575 /* vrshl */, ARM::MVE_VRSHL_by_vecu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
14339 { 3581 /* vrshr */, ARM::VRSHRuv16i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, },
14340 { 3581 /* vrshr */, ARM::VRSHRuv8i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, },
14355 { 3581 /* vrshr */, ARM::VRSHRuv16i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, },
14356 { 3581 /* vrshr */, ARM::VRSHRuv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, },
14362 { 3581 /* vrshr */, ARM::MVE_VRSHR_immu8, Convert__Reg1_2__Reg1_3__ShrImm81_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_ShrImm8 }, },
14398 { 3626 /* vrsra */, ARM::VRSRAuv16i8, Convert__Reg1_2__Tie0_1_1__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, },
14399 { 3626 /* vrsra */, ARM::VRSRAuv8i8, Convert__Reg1_2__Tie0_1_1__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, },
14414 { 3626 /* vrsra */, ARM::VRSRAuv16i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, },
14415 { 3626 /* vrsra */, ARM::VRSRAuv8i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, },
14453 { 3693 /* vshl */, ARM::VSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, },
14454 { 3693 /* vshl */, ARM::VSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, },
14468 { 3693 /* vshl */, ARM::MVE_VSHL_qru8, Convert__Reg1_2__Tie0_1_1__Reg1_3__VPTPredN2_0, AMFBS_HasMVEInt, { MCK_VPTPredN, MCK__DOT_u8, MCK_MQPR, MCK_rGPR }, },
14483 { 3693 /* vshl */, ARM::VSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
14484 { 3693 /* vshl */, ARM::VSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
14498 { 3693 /* vshl */, ARM::MVE_VSHL_by_vecu8, Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MQPR }, },
14508 { 3704 /* vshll */, ARM::VSHLLuv8i16, Convert__Reg1_2__Reg1_3__Imm1_71_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_Imm1_7 }, },
14518 { 3710 /* vshllb */, ARM::MVE_VSHLL_lwu8bh, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK__HASH_8 }, },
14519 { 3710 /* vshllb */, ARM::MVE_VSHLL_immu8bh, Convert__Reg1_2__Reg1_3__MVEShiftImm1_71_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MVEShiftImm1_7 }, },
14526 { 3717 /* vshllt */, ARM::MVE_VSHLL_lwu8th, Convert__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK__HASH_8 }, },
14527 { 3717 /* vshllt */, ARM::MVE_VSHLL_immu8th, Convert__Reg1_2__Reg1_3__MVEShiftImm1_71_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_MVEShiftImm1_7 }, },
14542 { 3724 /* vshr */, ARM::VSHRuv16i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, },
14543 { 3724 /* vshr */, ARM::VSHRuv8i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, },
14558 { 3724 /* vshr */, ARM::VSHRuv16i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, },
14559 { 3724 /* vshr */, ARM::VSHRuv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, },
14565 { 3724 /* vshr */, ARM::MVE_VSHR_immu8, Convert__Reg1_2__Reg1_3__ShrImm81_4__VPTPredR3_0, AMFBS_HasMVEInt, { MCK_VPTPredR, MCK__DOT_u8, MCK_MQPR, MCK_MQPR, MCK_ShrImm8 }, },
14611 { 3760 /* vsra */, ARM::VSRAuv16i8, Convert__Reg1_2__Tie0_1_1__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, },
14612 { 3760 /* vsra */, ARM::VSRAuv8i8, Convert__Reg1_2__Tie0_1_1__Reg1_2__ShrImm81_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, },
14627 { 3760 /* vsra */, ARM::VSRAuv16i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, },
14628 { 3760 /* vsra */, ARM::VSRAuv8i8, Convert__Reg1_2__Tie0_1_1__Reg1_3__ShrImm81_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, },
14989 { 3881 /* vsubl */, ARM::VSUBLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, },
14995 { 3887 /* vsubw */, ARM::VSUBWuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR }, },
15001 { 3887 /* vsubw */, ARM::VSUBWuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_DPR }, },
15038 { 3918 /* vudot */, ARM::VUDOTQ, Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3, AMFBS_HasDotProd, { MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, },
15039 { 3918 /* vudot */, ARM::VUDOTD, Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3, AMFBS_HasDotProd, { MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, },
15040 { 3918 /* vudot */, ARM::VUDOTQI, Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3__VectorIndex321_4, AMFBS_HasDotProd, { MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, },
15041 { 3918 /* vudot */, ARM::VUDOTDI, Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3__VectorIndex321_4, AMFBS_HasDotProd, { MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, },