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reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
 8362   case MCK_VecListThreeDAllLanes: {
 9652   case MCK_VecListThreeDAllLanes: return "MCK_VecListThreeDAllLanes";
12691   { 2370 /* vld3 */, ARM::VLD3DUPdAsm_16, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone }, },
12697   { 2370 /* vld3 */, ARM::VLD3DUPdAsm_32, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone }, },
12703   { 2370 /* vld3 */, ARM::VLD3DUPdAsm_8, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone }, },
12708   { 2370 /* vld3 */, ARM::VLD3DUPdWB_fixed_Asm_16, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, },
12709   { 2370 /* vld3 */, ARM::VLD3DUPdWB_register_Asm_16, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, },
12720   { 2370 /* vld3 */, ARM::VLD3DUPdWB_fixed_Asm_32, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, },
12721   { 2370 /* vld3 */, ARM::VLD3DUPdWB_register_Asm_32, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, },
12732   { 2370 /* vld3 */, ARM::VLD3DUPdWB_fixed_Asm_8, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, },
12733   { 2370 /* vld3 */, ARM::VLD3DUPdWB_register_Asm_8, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, },
15841   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15847   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15853   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15858   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15859   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15870   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15871   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15882   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
15883   { 2370 /* vld3 */, 4 /* 2 */, MCK_VecListThreeDAllLanes, AMFBS_HasNEON },
16291   case MCK_VecListThreeDAllLanes: