reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
 8012   case MCK_ModImm: {
 9604   case MCK_ModImm: return "MCK_ModImm";
10206   { 10 /* adc */, ARM::ADCri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10215   { 10 /* adc */, ARM::ADCri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
10235   { 14 /* add */, ARM::ADDri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10256   { 14 /* add */, ARM::ADDri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
10283   { 50 /* and */, ARM::ANDri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10296   { 50 /* and */, ARM::ANDri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
10341   { 96 /* bic */, ARM::BICri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10354   { 96 /* bic */, ARM::BICri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
10403   { 173 /* cmn */, ARM::CMNri, Convert__Reg1_1__ModImm1_2__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10417   { 177 /* cmp */, ARM::CMPri, Convert__Reg1_1__ModImm1_2__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10478   { 318 /* eor */, ARM::EORri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10488   { 318 /* eor */, ARM::EORri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
10793   { 687 /* mov */, ARM::MOVi, Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10841   { 730 /* msr */, ARM::MSRi, Convert__MSRMask1_1__ModImm1_2__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_MSRMask, MCK_ModImm }, },
10857   { 738 /* mvn */, ARM::MVNi, Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10884   { 754 /* orr */, ARM::ORRri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
10895   { 754 /* orr */, ARM::ORRri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
11003   { 909 /* rsb */, ARM::RSBri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
11011   { 909 /* rsb */, ARM::RSBri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
11016   { 913 /* rsc */, ARM::RSCri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
11020   { 913 /* rsc */, ARM::RSCri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
11034   { 938 /* sbc */, ARM::SBCri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
11043   { 938 /* sbc */, ARM::SBCri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
11356   { 1600 /* sub */, ARM::SUBri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, },
11372   { 1600 /* sub */, ARM::SUBri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, AMFBS_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, },
11426   { 1672 /* teq */, ARM::TEQri, Convert__Reg1_1__ModImm1_2__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, },
11442   { 1685 /* tst */, ARM::TSTri, Convert__Reg1_1__ModImm1_2__CondCode2_0, AMFBS_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, },
15346   { 10 /* adc */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15347   { 10 /* adc */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15348   { 14 /* add */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15349   { 14 /* add */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15350   { 50 /* and */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15351   { 50 /* and */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15357   { 96 /* bic */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15358   { 96 /* bic */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15369   { 173 /* cmn */, 4 /* 2 */, MCK_ModImm, AMFBS_IsARM },
15370   { 177 /* cmp */, 4 /* 2 */, MCK_ModImm, AMFBS_IsARM },
15388   { 318 /* eor */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15389   { 318 /* eor */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15503   { 687 /* mov */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15537   { 730 /* msr */, 4 /* 2 */, MCK_ModImm, AMFBS_IsARM },
15538   { 738 /* mvn */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15539   { 754 /* orr */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15540   { 754 /* orr */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15545   { 909 /* rsb */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15546   { 909 /* rsb */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15547   { 913 /* rsc */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15548   { 913 /* rsc */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15549   { 938 /* sbc */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15550   { 938 /* sbc */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15634   { 1600 /* sub */, 8 /* 3 */, MCK_ModImm, AMFBS_IsARM },
15635   { 1600 /* sub */, 16 /* 4 */, MCK_ModImm, AMFBS_IsARM },
15651   { 1672 /* teq */, 4 /* 2 */, MCK_ModImm, AMFBS_IsARM },
15654   { 1685 /* tst */, 4 /* 2 */, MCK_ModImm, AMFBS_IsARM },
16231   case MCK_ModImm:
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
11829   case MCK_ModImm: